Stuck-at fault
A stuck-at fault is the workhorse abstraction of testing: it pretends that a manufacturing defect has frozen a wire permanently at logic 0 (stuck-at-0) or logic 1 (stuck-at-1), no matter what the circuit tries to do to it. The real physical cause might be a metal sliver shorting the wire to ground, a broken connection, or a contaminating particle — but instead of modelling that messy physics, the test world says simply 'assume this one node is jammed at a value' and asks whether any test pattern would notice.
Its power is in counting and coverage. A circuit has a finite, enumerable list of possible stuck-at faults — two per signal line (stuck-at-0 and stuck-at-1) — so you can ask an ATPG tool to generate patterns that detect each one, then report exactly what percentage you caught. To detect a stuck-at-0 on a node, a pattern must set that node to 1 (so the fault makes it differ) and propagate the difference to an output. Decades of evidence show that patterns achieving high stuck-at coverage also catch most real defects, even though real defects are far weirder than a simple stuck wire.
Detecting requires activating the fault (opposite value) AND propagating it to an output.
Other fault models exist — transition (slow-to-rise/fall), bridging, IDDQ — but stuck-at remains the universal baseline because it is simple, complete, and proven to correlate with real yield loss.