Read/write margin (SNM)
A measure of how much abuse an SRAM cell can take before it forgets its bit or refuses to accept a new one — the safety cushion of the cell. Read margin (often quantified as the static noise margin, SNM) asks: when we open the access transistors to read, does the disturbance pulled in through the bitlines risk flipping the stored value? Write margin asks the opposite: can the write driver actually force the cell to change state, or is the cell too stubborn? A cell must be stable to read yet easy to write — two requirements that pull in opposite directions.
Designers visualize SNM with the famous 'butterfly curve': plot the two inverters' transfer curves against each other and the largest square that fits between the loops measures the noise margin in volts. The smaller the square, the closer the cell sits to failure. As transistors shrink, random dopant fluctuation makes the two halves of a cell mismatch, eroding margins — which is why nanometer SRAM is one of the hardest things to make reliable, and why assist circuits (boosting wordline or bitline voltages) are added to buy back margin.
There's an inherent tension: making the access transistor weaker improves read stability but hurts writeability, and vice-versa. Modern cells lean on read/write assist circuits to satisfy both at low voltage.