Wordline

The horizontal wire that selects an entire row of memory cells at once — the master key that opens every door along one shelf of the memory array. When the address decoder raises one wordline high, it switches on the access transistors of every cell in that row, connecting them to their bitlines so they can be read or written. All other wordlines stay low, keeping the rest of the array sealed and untouched.

Only one wordline (per bank) is active at a time, which is how a memory addresses millions of cells using a clean grid of rows and columns: the row decoder picks the wordline, the column logic picks which bitlines to use. Wordlines run across the array and drive hundreds of transistor gates, so they too are capacitively heavy; a too-slow wordline rise directly lengthens access time. In DRAM, the wordline must be boosted above the supply (a 'pumped' voltage) so the access transistor passes a full charge without losing a threshold drop.