Clock skew

Clock skew is the difference in arrival time of the same clock edge at two different flip-flops — the clock leaves the source as one tick, but because it travels through different lengths of wire and different numbers of buffers, it lands a little early at one register and a little late at another. Imagine a starting gun whose bang reaches the near runner before the far one: everyone is supposed to start together, but they don't quite. On a big chip with millions of flip-flops, getting that 'bang' to all of them at nearly the same instant is the central job of clock distribution.

Skew cuts both ways. If the capture clock arrives later than the launch clock, that extra time is handed to the data path — it relaxes setup but tightens hold. If it arrives earlier, the opposite. This is why skew is not simply a defect to be eliminated; engineers deliberately exploit small, controlled amounts of it (useful skew) to rob slack from easy paths and lend it to critical ones. Uncontrolled skew, however, is a primary cause of mysterious hold failures and is the reason clock tree synthesis exists.