hardware description language (HDL)
Imagine you are describing a kitchen to someone. A recipe says "first chop the onions, then heat the oil" — a sequence of steps that happen one after another. A floor plan, by contrast, says "the stove sits next to the sink, and a wire runs from the switch to the light" — it describes things that all exist at once, side by side. A hardware description language (HDL) is the floor plan, not the recipe. It is a specialized programming-style language for describing what a digital circuit is — which gates, registers, and wires exist and how they connect — rather than a list of instructions a processor runs one at a time.
This "everything happens at once" quality is what makes an HDL different from ordinary software code. When you write two blocks in an HDL, you are usually describing two pieces of hardware that operate in parallel — they run side by side, not one after the other. Some of that hardware is purely combinational and settles the moment its inputs change; other parts are sequential and update only on each tick of the clock. The language lets you capture a design at the register-transfer level (RTL) — describing how data moves between registers each clock cycle — and a synthesis tool then translates that description into an actual arrangement of logic gates on a chip, the way a builder turns a floor plan into walls and plumbing.
The two HDLs you will meet in practice are Verilog (and its modern superset SystemVerilog) and VHDL. They look quite different on the page but do the same job: they let engineers write, simulate, and verify a circuit as text long before any silicon is manufactured. The same description can be fed to a simulator to check that it behaves correctly, and its synthesizable core can then be handed to synthesis to become a real gate-level netlist — one description, two destinies.
// A 1-bit register: q follows d on each rising clock edge always @(posedge clk) q <= d;
A tiny piece of hardware described as text — on every rising edge of the clock, the stored value `q` takes on the input `d`. This is hardware, not a step run by a processor.
"Description" is the key word. An HDL describes structure and behavior so that a tool can build the hardware; it is not compiled into instructions for a CPU to execute. The same word "language" misleads newcomers — an HDL is closer to an architect's blueprint than to a recipe written in C or Python.