The Processor: Datapath & Control

data memory

If instruction memory is the cookbook telling the chef what to do, data memory is the pantry holding the actual ingredients. It is the large pool of storage where the program keeps its values — array elements, struct fields, anything too big or too numerous to live in the small register file. Loads take an ingredient out of the pantry; stores put one back.

In the single-cycle datapath, data memory is a box with an address input, a write-data input, a read-data output, and two control signals: MemRead and MemWrite. A load instruction computes an address in the ALU, asserts MemRead, and the value at that address flows back to the register file. A store computes an address, places the register's value on the write-data input, asserts MemWrite, and the value is written. Only load and store instructions touch data memory at all; an arithmetic instruction leaves it untouched.

Two honest points. First, data memory is separate from instruction memory in the diagram only to keep the teaching datapath simple (the Harvard split); real cores share one address space and use separate caches. Second, this is the only stage that can both read and write the big memory, which is why it sits on the long critical path of the single-cycle design — and why a load is usually the worst-case instruction that pins the clock period.

For 'lw x5, 8(x1)': the ALU computes x1 + 8 as the address, MemRead is asserted, and data memory returns the 4-byte value there, which is then written into register x5. For 'sw x5, 8(x1)' the same address is computed but MemWrite is asserted and x5's value is stored.

The large value store; only load and store instructions read or write it, gated by MemRead/MemWrite.

Don't confuse data memory with the register file. Registers are a handful of ultra-fast named slots inside the CPU; data memory is the large, slower store outside it that you reach only through loads and stores.

Also called
data storeD-mem