instruction memory
Think of a cookbook open on the counter, where each page holds one step of the recipe. The chef reads the page at the current bookmark, does that step, then advances the bookmark. Instruction memory is the CPU's cookbook: a memory that, given an address, hands back the bits of the instruction stored there. The bookmark is the program counter.
In the textbook single-cycle datapath, instruction memory is drawn as a simple read-only box with one input (an address, supplied by the program counter) and one output (the instruction word at that address, often 32 bits). Each clock cycle the PC presents an address, and instruction memory returns the corresponding instruction so the rest of the datapath can decode and execute it. It is read every single cycle because every instruction must first be fetched before anything else can happen.
An honest clarification: separating instruction memory from data memory in the diagram reflects the Harvard-style split used to keep the teaching datapath clean — fetching an instruction and reading a data value can then happen in the same cycle without a conflict. Real machines usually have one unified main memory but achieve the same effect with separate instruction and data caches near the core. So instruction memory is best read as 'the instruction cache / fetch port', not as a physically distinct chip.
If the PC holds 0x0040 and the word at 0x0040 is the encoding for 'add x3, x1, x2', then instruction memory returns those 32 bits this cycle; the decoder then reads opcode and register fields from them.
Address in (from the PC), instruction word out — every cycle begins with a fetch from instruction memory.
In the teaching model instruction memory is read-only and never written by the running program. Real systems do allow code to live in writable memory, but the clean datapath ignores self-modifying code to stay simple.