UVM sequencer

A UVM sequencer is the traffic controller that sits between sequences (which decide what stimulus to generate) and the driver (which physically applies it). When several sequences want to send transactions to the same interface at once, the sequencer arbitrates — choosing whose transaction goes next, in what order, by priority — and then routes the winner down to the driver. It is the air-traffic control tower: many planes want the one runway, and the tower grants clearance one at a time so they never collide.

Most of the time you never write a sequencer; the base class does its job invisibly. It matters when you need arbitration policy (round-robin vs. strict priority), when a sequence must grab exclusive access to the driver mid-stream (a lock or grab), or when multiple stimulus generators legitimately compete. Understanding the sequencer-driver handshake is the single most clarifying step for newcomers, because it explains exactly how an abstract 'do a write' becomes real activity on the pins.