dynamic power
Dynamic power is the energy a chip burns every time a signal flips from 0 to 1 or back — the cost of doing actual work. Picture a bucket brigade: every wire on the chip is a tiny bucket (a capacitor) that must be filled with charge to go high and dumped to go low. Each fill-and-dump spills a little water on the ground, and that spilt water is wasted energy. The more buckets you flip, and the faster you flip them, the more you spill.
The classic formula is P_dyn = α·C·V²·f: α is the activity factor (what fraction of nodes toggle each cycle), C the switched capacitance, V the supply voltage, and f the clock frequency. Notice voltage enters squared — halving V quarters this power, which is why low-power design obsesses over running circuits at the lowest voltage that still works. A modern 5 nm SoC core can dissipate several watts of dynamic power flat-out, and shutting off clocks to idle blocks (clock gating) is the cheapest way to cut α to zero.
Dynamic power has two parts: switching power (charging load capacitance) plus short-circuit power (the brief moment both pull-up and pull-down transistors conduct during a transition). The switching term dominates in well-designed CMOS.