gate-all-around (GAA / nanosheet)

Every chip rung below this one keeps running into the same wall: as transistors shrink, the gate loses its grip on the channel. The gate is the switch's finger; the channel is the wire it pinches off to stop current. When the channel gets too short and too wide, the finger can only press from the top, and stray voltage from the source and drain starts leaking current through the bottom even when the switch is supposed to be off. FinFET answered this at around 22nm by standing the channel up as a thin vertical fin so the gate could wrap it on three sides. Gate-all-around takes the obvious next step: instead of three sides, wrap all four.

In a GAA device the channel is no longer one fin but a short stack of thin horizontal sheets (hence nanosheet; Intel calls its version RibbonFET), and the gate material is grown completely around each sheet, top, bottom, and both sides. With the gate surrounding the channel on every side, it has the tightest possible electrostatic control, so it can switch a very short channel fully off with very little leakage. That is the limit GAA answers, and it is why the industry moved to it at roughly the 3nm to 2nm generations, where FinFET fins had become too tall, thin, and leaky to push further. A bonus is tunability: you set drive strength by how wide you make the sheets rather than by adding more fins, which gives designers finer control over how much current a transistor can deliver.

Keep in mind that a node name like 3nm is a marketing label, not the physical size of anything on the chip; no gate is literally 3 nanometers long. GAA is best understood as the structure that keeps the gate in charge of an ever-shorter channel, buying CMOS a few more generations of scaling. The next step beyond it, stacking an n-type and a p-type device on top of each other, is CFET, which is still a research and early-development frontier.