FinFET

For decades a transistor was basically flat: a thin channel lying along the surface of the silicon, with the gate pressed onto it from above like a hand resting on a tabletop. That worked beautifully until the transistors got so small that the channel became too short to control. Once the source and drain crowd close together, the gate loses its grip and current leaks through even when the switch is supposed to be off. That leakage is wasted power, and it was one of the walls that ended the easy era of scaling. A FinFET is the fix: instead of leaving the channel flat, you stand it up on edge as a thin vertical wall of silicon, called a fin, and let the gate wrap over the top and down both sides. Now the gate touches the channel on three faces instead of one, so it grabs the current far more firmly and shuts it off cleanly.

The intuition is simple once you picture it. Controlling a thin sheet from a single side is like trying to pinch off a garden hose by pressing on it with one finger from above; control it from three sides and it is like wrapping your whole hand around the hose, and almost nothing gets through when you squeeze. That tighter electrostatic control means less leakage at small sizes, lower off-state power, and the ability to keep shrinking when the old planar transistor simply could not. FinFETs became the mainstream logic transistor at roughly the 22nm node and carried high-performance chips down through the single-digit-nanometer generations.

It is worth remembering that those node names are marketing labels, not the physical width of anything; a '7nm' fin is nowhere near 7nm across. The fin geometry is what actually buys the control. Eventually even three-sided wrapping is not enough, and the next step is to wrap the gate all the way around the channel on all four sides, which is where gate-all-around nanosheet transistors take over at 3nm and below.