static power
Imagine a water tank whose tap is shut off, yet a slow drip seeps through the seals all day long. You are not using any water on purpose, but the tank keeps losing it. A modern transistor is like that: even when it is switched off and doing nothing, a tiny current leaks across it. Multiply that trickle by billions of transistors and you get static power — the power a chip burns simply by being powered on, whether or not it is computing.
Static power, also called leakage power, is consumed whenever the chip has voltage applied, independent of how fast it switches. Its main source is leakage current through transistors that are nominally 'off' — as transistors shrank, their insulating layers got so thin that electrons tunnel and seep through. Leakage rises sharply with temperature (a hot chip leaks more, which heats it further, a dangerous feedback) and with lower threshold voltages. Unlike dynamic power, which you can cut by slowing the clock, static power keeps draining even an idle core — the only way to stop it is to cut the power to that block entirely.
Static power is why the simple dynamic formula is no longer the whole truth, and why it reshaped design. In older, larger technologies leakage was negligible and engineers could ignore it; below roughly the 90-nanometer era it became a major fraction of total power, and at times the dominant one. This is a big part of why Dennard scaling ended: you could no longer shrink transistors and lower voltage for free, because leakage refused to scale down with them. The practical answers are power gating (literally switching off the supply to unused blocks) and dark silicon (accepting that you cannot keep every transistor powered and switching at once).
A laptop chip idles with all cores 'on' but doing no work, yet still draws several watts — that is mostly leakage. The fix is power gating: the operating system tells the hardware to disconnect the supply from idle cores, dropping their static power to nearly zero, at the cost of a small delay to power them back up.
Slowing the clock cannot stop leakage; only cutting the supply (power gating) does. That is what idle cores rely on.
Static power does not vanish when a core is idle but still powered — only removing its supply does. Leakage also climbs steeply with temperature, creating a feedback loop that thermal design must contain.