SIMD
/ sim-dee /
Imagine a stamp that is not one rubber face but eight side by side, all inked alike. Press it once and you stamp eight envelopes in a single motion. A SIMD instruction is that stamp. SIMD stands for single instruction, multiple data: one instruction, decoded and issued once, performs the same operation on several data elements simultaneously, each in its own lane of a wide register.
Concretely, a SIMD add does not take two 32-bit numbers and produce one sum. It takes two 256-bit registers, treats each as eight 32-bit numbers laid side by side, and produces eight sums in one go — lane 0 plus lane 0, lane 1 plus lane 1, and so on, all in the same hardware cycle. The processor fetched and decoded only one instruction, so the per-element overhead of fetching, decoding, and counting the loop is divided across all the lanes. That is where the speed comes from: not faster arithmetic per element, but far less bookkeeping per element.
SIMD is one of four boxes in Flynn's taxonomy, alongside SISD (a plain scalar CPU: one instruction, one datum), MIMD (many cores, each with its own instructions and data — that is multicore), and the rarely-used MISD. SIMD is the engine behind the vector-processor idea, the SSE/AVX/NEON extensions baked into ordinary CPUs, and — in a relaxed thread-flavoured form called SIMT — GPUs. Its hard limit is honesty about its shape: every lane must do the same operation in the same step. If lane 3 needs a different operation, or wants to branch a different way, SIMD has no clean answer, and you pay for it.
addps in x86: one instruction adds two 128-bit registers as four pairs of 32-bit floats, producing four sums at once. A scalar version needs four separate add instructions plus four loads and four stores; the SIMD version does the four adds with one instruction over wide loads.
One instruction, several lanes, the same operation in each lane — the essence of SIMD.
SIMD is not multicore. Multicore (MIMD) gives each core its own independent instruction stream; SIMD gives one instruction stream many data lanes. They solve different problems and a good system uses both.