a shared-memory multiprocessor

Imagine several people working in one office around a single shared whiteboard. Anyone can read it, anyone can write on it, and everyone sees the same board. To pass a message you do not walk over and hand someone a note — you just write on the whiteboard, and your colleague reads it. A shared-memory multiprocessor is built on this idea: many cores all see one common pool of memory, with one set of addresses, and they cooperate by reading and writing the same memory locations.

Concretely, every core can issue a load or store to any address in the shared physical memory, and address 0x4000 means the same byte to all of them. When core A wants to tell core B something, A writes a value to an agreed address and B reads it back — communication is implicit in ordinary memory operations, with no explicit send or receive. This is the dominant model inside a single multicore chip and across the sockets of one server, and it is what most multithreaded programs assume.

The convenience hides two hard problems that the rest of this field is about. First, each core keeps private cached copies of shared data, so when one core writes, the others may still be holding a stale copy — that is the cache-coherence problem. Second, when several cores read and write the same locations, the exact interleaving of who-sees-what-when must be pinned down — that is the memory-consistency model. Shared memory is easy to picture and easy to get subtly wrong; making it correct and fast is the central engineering of multicore.