mnemonics, operands, and addressing modes
/ mnemonic: nuh-MON-ik /
Read one line of assembly and you will see two kinds of thing: a short word saying what to do, then the things to do it to. The short word is a mnemonic — a memorable abbreviation for an operation, like mov (move), add, cmp (compare), or jmp (jump). The things it acts on are the operands. So mov rax, 5 reads 'mnemonic mov, with operands rax and 5'.
Operands come in a few flavours, and how an operand names its value is called its addressing mode. An immediate operand is a constant baked right into the instruction — the 5 in mov rax, 5. A register operand names a register, like rax, and means 'the value currently in that register'. A memory operand names a location in memory and means 'the value at this address'; the address can be given several ways, and a common one is base-plus-displacement, written like [rbp-8], meaning 'the address in rbp, minus 8'. More elaborate memory modes add an index register and a scale, as in [rbx + rcx*4], which is exactly how indexing an int array (4 bytes per element) is expressed.
These pieces are the grammar of every instruction. Recognising at a glance whether an operand is an immediate, a register, or a memory reference — and reading [base + index*scale + disp] — is most of what it takes to follow disassembly. The addressing modes are also where high-level constructs become visible: array indexing turns into a scaled-index memory operand, a struct field access into a displacement, a pointer dereference into a plain register-indirect access like [rax].
In mov eax, [rbx + rcx*4 + 8], the mnemonic is mov and the source operand is a memory reference reading from address rbx + rcx*4 + 8 — exactly the shape of arr[i] inside a struct.
Mnemonic = what to do; operands = what to do it to; addressing mode = how each operand names its value.
Square brackets around an operand mean 'the memory at this address' (a dereference), while the bare register means the value in the register itself — confusing the two is the single most common mistake reading assembly. Available addressing modes are ISA-specific: a RISC like AArch64 offers far fewer than x86-64.