IR drop

IR drop is the voltage your circuits lose on the way to the wall socket — except the "wall socket" is the chip's power delivery network, the dense mesh of metal that carries VDD and ground to every cell. That metal is not a perfect conductor; it has resistance. And whenever current flows through resistance, some voltage gets spent just pushing through the wire, exactly as Ohm's law says: V = I*R. So a cell sitting deep inside a busy region doesn't see the full 0.8 V the package delivers — it sees 0.8 V minus everything the current burned crossing the grid to reach it. The name is literal: I (current) times R (resistance) is the volts that go missing. Picture water pressure at the top-floor tap of a tall building during a morning rush — by the time it climbs all that pipe with everyone showering at once, the pressure sags.

Why care? Transistors switch slower when their supply sags, because a lower rail means less gate overdrive to charge the next node. So IR drop quietly stretches every gate delay in the affected region, and a timing path that passed at the nominal voltage can suddenly miss its setup deadline at the drooped voltage — which is why modern timing signoff is voltage-aware and checks paths at the actual local rail, not the datasheet number. Push the droop far enough and logic doesn't just slow down, it stops resolving correctly and a flop can latch the wrong value. There are two flavors. Static IR drop is the steady-state sag from average current through the grid's resistance — fix it with a beefier PDN: wider power straps, more rows of them, more vias stitching the layers together. Dynamic IR drop is the fast transient when a big block switches all at once and yanks a large current in a few picoseconds; here the di/dt and the inductance of the path matter too, the rail momentarily collapses and then rings back, and the cure is on-die decoupling capacitance plus spreading high-activity cells so they don't all gulp current from the same spot at the same instant.