interposer

Once you decide to stop building one giant chip and instead place several smaller chiplets side by side, you hit a new problem: how do you wire them together? Ordinary circuit-board traces are far too coarse — they carry maybe dozens of connections per millimeter, while the edge of a modern die wants thousands. An interposer is the answer. It is a thin slab — usually silicon, sometimes an organic laminate — that sits underneath the chiplets and acts as a private, ultra-fine wiring floor between them. The chiplets are flip-mounted on top with tiny solder microbumps, the interposer routes the dense traffic horizontally from one to the next, and a coarser set of bumps on its underside connects the whole assembly down to the package and board.

This is what people mean by 2.5D integration: the chips still live in a single plane, edge to edge, rather than being stacked vertically (true 3D). The interposer just gives them a much richer set of connections than a board ever could. Because silicon can be patterned with the same lithography used to make chips, a silicon interposer offers wire pitches measured in micrometers, plus the option of through-silicon vias (TSVs) that punch straight down so power and board signals can pass through it. That fine pitch is precisely why HBM works the way it does: a stack of TSV-bonded DRAM is set right next to the logic die on a shared interposer, and the thousands of short, dense wires between them are what deliver the enormous memory bandwidth — answering the memory wall that a narrow off-package bus could never solve.

The trade-off is cost and size. A large silicon interposer is itself a piece of fabricated silicon, expensive and limited by how big a single exposure can print, which is why organic and bridge-based alternatives (embedding only a small silicon bridge where the dense wiring is actually needed) have grown popular. But the core idea holds: the interposer is the shared foundation that makes chiplet systems possible, letting you mix dies from different process nodes and keep only the known-good ones, while still wiring them together almost as tightly as if they were one chip.