High-speed & SerDes

SerDes

A SerDes (serializer/deserializer) is the on-chip machine that lets two chips talk over a single fast wire instead of a wide, slow bus. Imagine 16 people trying to shout across a noisy room: rather than building 16 separate phone lines, you take turns and send everyone's words one after another down one good line — then reassemble them on the far side. The serializer multiplexes a parallel word (say 16 or 32 bits at, say, 1 GHz) into one bit stream running 16-32× faster (16-32 Gb/s), and the deserializer at the other end clocks that stream back into a parallel word.

SerDes is why a PCIe slot needs only a handful of pins instead of a hundred, and why a 400 Gb/s Ethernet port, USB, SATA, HDMI, and the link between an AI accelerator and its HBM all look the same under the hood. The win is pin count and board routing; the price is that each lane now runs so fast that the copper trace behaves like a lossy, ringing transmission line, forcing the elaborate equalization, clock recovery, and error-coding machinery that the rest of this field is about.

line_rate = parallel_width × parallel_clock (e.g. 32 bit × 1 GHz = 32 Gb/s)

A SerDes is rated by its line rate (Gb/s per lane, e.g. 28G, 56G, 112G) and you multiply by the number of lanes for aggregate bandwidth — a 16-lane PCIe Gen6 link at 64 GT/s reaches roughly 1 TB/s.

Also called
serializer/deserializer串化解串化器高速序列鏈路