Computer architecture & accelerators

Instruction set architecture (ISA)

An ISA is the contract between hardware and software — the exact menu of commands a processor promises to understand, like 'add these two registers', 'load this word from memory', or 'jump if zero'. Think of it as the keyboard layout of a chip: software composes its sentences only from these keys, and as long as a chip honours the same menu, code written years ago still runs, even though the silicon underneath has been completely redesigned.

The ISA fixes how many registers exist, how big a word is (32- or 64-bit), how memory is addressed, and the binary encoding of every instruction — but deliberately says nothing about how the work gets done inside. That separation is why an old x86 program runs on both a tiny Atom and a giant Xeon: same ISA, wildly different microarchitectures. The great divide is CISC (x86 — many rich, variable-length instructions) versus RISC (Arm, RISC-V — few simple fixed-length ones that pipeline easily); RISC-V matters because it is open and free, letting anyone build a compatible chip without a licence.

A single RISC-V instruction: add registers x6 and x7, store the sum in x5.

The ISA is the architecture; the actual circuit implementing it is the microarchitecture. Intel and AMD ship totally different microarchitectures yet share the x86 ISA — that is precisely the point of the abstraction.

Also called
ISA指令集