3D IC

A 3D IC stacks active silicon dies vertically and connects them face-to-face or through the body of the silicon, so signals travel up and down between layers instead of out to the side. If 2.5D is several towers on one platform, 3D is putting one chip directly on top of another and drilling express elevators straight between the floors. Those elevators are through-silicon vias and, in the most advanced form, hybrid copper-to-copper bonds that join two wafers with no solder at all.

Going vertical slashes the distance signals travel — a connection between stacked layers can be hundreds of times shorter than routing the same nets across a board — which means lower latency, dramatically higher bandwidth, and less energy per bit. Memory-on-logic (cache stacked on a CPU) and stacked DRAM (HBM) are the flagship uses. The hard part is heat: a buried die can't dump warmth out its back the way a top die can, so power-hungry layers must be placed and cooled with great care.