a flash ADC

A flash ADC is the sprinter of the converter family — it produces an answer in a single, near-instant step. The trick is brute force: instead of testing the input bit by bit, it compares the input against EVERY possible level at once, all in parallel, and reads off the result immediately. The name fits: the conversion happens in a flash. This is how you digitize signals at hundreds of millions or billions of samples per second, as in radar, fast oscilloscopes, and high-speed communications.

Inside, a flash ADC is a tall stack of comparators, one for every threshold. An n-bit flash needs 2^n minus 1 comparators, each fed a slightly different reference voltage from a resistor divider chain. When the input arrives, every comparator at once says 'input above me' or 'input below me'. The boundary between the yes-comparators and the no-comparators marks the input's level, and a block of logic (a priority encoder) turns that pattern into a binary number in one clock. There is no searching and no waiting — the whole ladder of comparators decides simultaneously.

Why this matters, and the brutal honest cost: that parallelism explodes with resolution. Each extra bit DOUBLES the comparator count — a 4-bit flash needs 15 comparators, an 8-bit needs 255, a 10-bit needs 1,023, and 12 bits would need 4,095. All those comparators burn a lot of power, take up a lot of chip area, and load the input heavily. So flash converters are the right tool only when raw speed is everything and you can accept low resolution (typically 6 to 8 bits). For more bits at sane power, you reach for SAR or sigma-delta instead, or for pipelined designs that use small flash stages in sequence.