Advanced nodes & devices

dark silicon

Imagine a busy restaurant kitchen where you have ten stoves but the ventilation hood can only carry away the heat of three burners at once. You can own all ten, but if you fire them all up together the kitchen fills with smoke and everyone has to stop. So at any given moment most of your stoves sit cold while a few do the cooking. A modern chip faces the same bargain. Transistors have kept shrinking, so engineers can pack a huge number of them onto a die, but the package can only shed a fixed amount of heat. Dark silicon is the fraction of those transistors that must be kept switched off at any instant because if everything ran at full speed at once, the chip would melt. The transistors are there on the die, paid for and printed, but a large slice of them is necessarily dark.

This is the direct bill that came due when Dennard scaling ended around 2006. Dennard's rule used to promise that as transistors got smaller you could also lower their voltage, so the power density (watts per square millimeter) stayed flat even as you crammed in more devices. Once that voltage scaling stalled, each new generation kept doubling the transistor count but no longer kept the per-transistor power falling fast enough to match. Power density started climbing, and since you cannot cool an unlimited number of watts out of a fixed package, you simply cannot power the whole die at once. Estimates from the early 2010s suggested that at advanced nodes well over half of a chip could be dark at any given time, and the gap widens with each node. The transistors are cheap to print; the watts to switch them are the scarce resource.

Dark silicon is less a defect than a design opportunity: if you can't light up the whole die at once, you spend the spare transistors on many specialized, mostly-idle accelerators and wake only the right one for each task — which is exactly the logic behind domain-specific architectures and the accelerator-packed SoCs in today's phones.

Also called
utilization wall