the memory management unit (MMU)

Think of the diligent translator-and-guard stationed at the doorway between the CPU and memory: every address that leaves the CPU passes through them, gets converted from the program's private numbering to the building's real coordinates, and is checked for permission — all in a blink, on every single access. The memory management unit is this piece of hardware: the part of the chip that performs address translation and protection checks for every memory reference.

Concretely, the MMU sits between the CPU core and the rest of the memory system. When the core issues a virtual address, the MMU first consults its TLB; on a hit it produces the physical address and protection result almost instantly. On a TLB miss it performs (or triggers) a page-table walk to find the translation, installs it in the TLB, and proceeds. If the page is not present, the MMU raises a page-fault exception to the OS; if the access violates protection bits, it raises a protection fault. The MMU also typically holds the page-table base register that points at the current process's page table, which the OS reloads on each context switch.

Why it matters: the MMU is where virtual memory becomes real and fast — it does in hardware, on the critical path, what would be hopelessly slow in software. It is the concrete embodiment of the hardware/OS co-design: the MMU mechanically translates and checks, while the OS sets the policy by building the page tables and handling faults. Without an MMU, a processor cannot offer true virtual memory or hardware-enforced process isolation (which is why the simplest microcontrollers, lacking an MMU, run all code in one shared physical address space).