address translation

Picture a receptionist whose only job is to convert the room number a visitor names ('room 412') into the building's real location ('north wing, cupboard 503') by looking it up in a directory — and to refuse the visitor if room 412 is not theirs to enter. Address translation is exactly this lookup-and-check, performed on every single memory access, converting a program's virtual address into the physical address the memory chips understand, while enforcing permissions.

Concretely, translation works page by page. The virtual address is split into a virtual page number and an offset. The page number indexes the page table; the matching entry gives a physical frame number plus a valid bit and protection bits. The hardware checks the valid bit (is this page present in memory?) and the protection bits (is this read/write/execute allowed?). If all is well, it builds the physical address as (frame number, offset) and the access proceeds. If the page is not present, a page fault traps to the OS; if protection is violated, a fault traps too (often killing the program). To avoid paying for a full page-table walk every time, recent translations are cached in the TLB.

Why it matters: translation is the mechanism that makes the whole illusion real, and it is on the critical path of every load and store, so it must be fast — which is why hardware (the MMU and TLB) does it, not software. It also unifies several features at once: relocation (any virtual page can map to any frame), protection (per-page permission checks), and sharing (two page tables can point at the same frame). The honest cost: a TLB miss forces a slower page-table walk, and that overhead, multiplied across billions of accesses, is real.