The crime scene: a smeared pulse and a shut eye
Imagine shouting a single sharp word down a long, soft corridor. By the time the sound reaches the far end it is no longer a crisp word — it is a muffled, drawn-out *whoom* with echoes still arriving after you have already started the next word. The listener hears your words bleeding into each other. A 1-metre copper trace at 56 Gbaud does exactly this to a bit. Rung 3 named the damage with a number: insertion loss of 20–35 dB at the Nyquist frequency, meaning the channel passes barely a hundredth of your high-frequency energy. The sharp transmitted pulse arrives as a long, low hump whose tail overlaps the next several bits.
That overlap has a name you met in rung 2: inter-symbol interference (ISI). Each bit's leftover energy adds to or subtracts from its neighbours, and which neighbours depends on the *data pattern* — so the smear is different on every bit. Stack thousands of bit-windows on top of each other and you draw an eye diagram; ISI is precisely what collapses the clean open eye of rung 2 into the murky, nearly-shut blob the receiver chokes on. The slicer needs vertical room (voltage margin) to tell a 1 from a 0 and horizontal room (timing margin) to sample at the right instant. ISI steals both.
ONE bit launched as a clean pulse, received after a lossy channel:
TX pulse (sent) RX pulse (received) = main + ISI tail
___ .-"""-.
| | _.-' '-._____
__| |__ one UI __-' main tail spills into
(T) cursor bits n+1, n+2, n+3 ...
EYE before equalization (many bits overlaid): after EQ:
v | . :::::::::: . v | .-""""-.
| :::::::::::::::: ---> | / OPEN \
| :::::: (shut) :::: | | EYE!! |
| :::::::::::::::: | \______/
+------------------ t +------------- t
slicer is BLIND here room to decide 1/0Equalization: the umbrella, and the inverse-channel idea
Equalization is the umbrella term for any circuit that reshapes the signal to undo channel distortion. The dream is simple to state: if the channel multiplies your spectrum by H(f), build a filter with response 1/H(f) and the product is flat — the corridor's muffling is exactly reversed and the sharp pulse comes back. Engineers literally call this an inverse-channel or zero-forcing target, because it tries to force every ISI cursor to zero.
But there is a viper in this Eden, and naming it tells you why we need *three* equalizers instead of one. The channel killed your high frequencies; the inverse channel must therefore have enormous high-frequency gain — and noise lives at every frequency. A pure inverse filter cheerfully amplifies the channel's own thermal noise and any crosstalk right alongside the signal. Boost 30 dB at Nyquist and you boost the noise floor 30 dB too. So the real engineering question is never "can I invert the channel" — it is "how do I undo the ISI without blowing up the noise." Each of the three workhorses answers that question with a different bargain.
CTLE: an analog high-pass boost on the receiver
The continuous-time linear equalizer is the simplest idea in the book: if the channel is a low-pass filter, put a high-pass-ish amplifier in front of the receiver that does the mirror image. It does not touch individual bits; it is a small analog filter that simply turns the *treble knob up*. Picture a graphic equalizer on a stereo — the channel rolled off the highs, so CTLE lifts them back. Crucially it runs in continuous time, on the raw analog waveform, with no clock and almost no power — typically a few milliwatts and a single sliver of silicon at the front of the receiver.
Inside, a CTLE is often a differential pair with a clever trick: a resistor and capacitor sit across the source/emitter degeneration path. At low frequencies the capacitor is an open circuit, the degeneration resistor is fully in play, and the gain is held *low*. As frequency rises the capacitor's impedance falls, it shorts out the resistor, the degeneration vanishes, and the gain *climbs*. The result is a transfer function with a zero (where gain starts rising) followed by poles (where it flattens and eventually falls) — exactly the high-frequency lift you want, and you tune it by trimming R and C.
Channel response CTLE response Combined
gain |‾‾‾‾\__ gain | __/‾ gain |‾‾‾‾‾‾‾‾‾
(dB) | ‾‾‾\__ | __/ | (flat-ish!)
| ‾‾‾\___ + |__/ = |
| low-pass ‾‾\_ | high-pass boost | inverse-ish
+------------------- f +-------------- f +------------- f
DC Nyquist zero poles DC Nyquist
CTLE core (degenerated diff pair): low f: C open -> R degenerates -> LOW gain
Vout+ o--[R_L]--+ +--[R_L]--o Vout- high f: C shorts R -> NO degen -> HIGH gain
M1 M2 => peaking transfer function
Vin+ o--| | | |--o Vin- tuned by trimming R_s, C_s
+--[R_s||C_s]--+
|
tail IFFE: a tapped filter that pre-shapes the pulse
Where CTLE shapes a smooth curve, the feed-forward equalizer (FFE) attacks ISI bit-by-bit with surgical precision. It is a short FIR filter — a tapped delay line. The signal flows through a chain of one-UI delays; at each tap you scale a copy by a weight and sum them all. If the channel adds a known echo two bits later, you add a small *negative* copy of the signal delayed by two bits, and the echo cancels at the slicer. You are literally sculpting the transmitted pulse so that, *after* the channel mangles it, it lands as a clean single spike.
The beautiful move is to put the FFE on the transmitter, where it is called pre-emphasis or de-emphasis. Why there? Because the transmitter's signal is still pristine and noise-free. If you spend a tap reducing the energy of bits that follow a transition (de-emphasis), you pre-distort the pulse so it arrives clean — and you have spent *no* noise doing it, because there was none yet to amplify. A typical SerDes TX-FFE has 3 to 5 taps: usually one pre-cursor tap (fixing the leading edge), one main cursor, and one or more post-cursor taps (cancelling the trailing tail).
3-tap FFE (FIR) tapped delay line: y[n] = c-1 x[n+1] + c0 x[n] + c+1 x[n-1]
x ---+---[z^-1]---+---[z^-1]---+
| | |
(c-1=-0.1) (c0=+0.8) (c+1=-0.2) <- weights, often sum-of-|c|=1
| | |
+-----------(+)----------+----> y (pre-shaped pulse)
TX pre/de-emphasis in the time domain (each ___ is one UI):
data: 0 1 1 1 0 de-emphasis lowers the LEVEL of bits
plain TX: ___________ that FOLLOW a transition, so the
___| |___ channel's settling no longer piles
up as ISI:
FFE TX: _
___| |__ __ ___ (tall edge, then backed-off run)
v v
first bit after edge gets full swing; rest de-emphasizedDFE: cancel the tail of bits you already know
Here is the cleverest idea on the page. CTLE and FFE both fight ISI by filtering the *analog* signal, and both pay the noise tax because they cannot tell signal from noise. The decision-feedback equalizer (DFE) escapes the tax with a trick of timing. Think about the moment the slicer decides bit *n*. The ISI smearing bit *n* comes mostly from earlier bits — *n−1*, *n−2*, *n−3* — and those bits have already been decided. A decided bit is a perfect, noise-free 1 or 0. So instead of filtering a noisy waveform, the DFE computes exactly how much tail those known bits dump onto the current sample and *subtracts it before the slicer decides*.
Because it feeds back *decisions* (clean digital bits) and not the *waveform*, the DFE adds zero noise amplification — this is its superpower and the reason it can crack channels CTLE cannot. The architecture is a feedback loop: take the last N decided bits, scale each by a tap weight equal to that bit's known ISI contribution, sum them, and subtract from the incoming signal at the summing node just ahead of the slicer.
summing slicer
in ---->( + )---------> node -------->|>--+---> decided bits d[n]
^ |
| ___________________ |
+-------| sum of w_k * d[n-k] |<-+ one-UI delays z^-1
- ‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
SUBTRACT feedback taps w_1..w_N (known POST-cursor ISI)
Why zero noise gain: the feedback contains DECIDED bits d[n-k] = clean +1/-1,
so scaling & subtracting them injects NO channel noise back into the path.
LIMITS:
* only POST-cursor ISI (bits already decided). PRE-cursor ISI (the bit
not yet decided) is invisible to a DFE -> that's the FFE/CTLE's job.
* ERROR PROPAGATION: if the slicer makes one wrong decision, the wrong
bit is fed back and corrupts the next few -> a short burst of errors.
* the first feedback tap is a brutal TIMING problem: decide bit n AND
feed it back before bit n+1 arrives (one UI ~ 18 ps at 56 Gbaud).The winning team: CTLE + DFE, and reading the reopened eye
Now the scorecard pays off. Look at what each block is good and bad at and the pairing writes itself. CTLE is cheap and lifts the *whole* high band — including pre-cursor and far ISI — but amplifies noise, so it can only do so much. DFE cancels post-cursor ISI with *zero* noise gain — but it cannot touch pre-cursor ISI and it struggles if the residual tail is too long. Bolt them in series and they cover each other exactly: CTLE first to flatten the gross channel roll-off and knock down the pre-cursor and long-tail ISI a linear stage can reach, then DFE to surgically null the remaining post-cursor cursors with no extra noise. This CTLE-plus-DFE combination is the default receiver in virtually every modern SerDes — PCIe, Ethernet, the lot.
A full link usually fans the work across both ends: a 3–5 tap TX-FFE pre-shapes the pulse before launch (handling pre-cursor ISI cheaply, in the noise-free domain), then on the receiver a CTLE flattens the band and a multi-tap DFE finishes the job. The settings are not hand-tuned; an adaptation engine watches the recovered data and dithers every tap weight to minimize error, continuously, as temperature and voltage drift. That is the link 'training' you hear about when a PCIe or 100G Ethernet port negotiates at power-on.
- TX-FFE (transmitter): a 3–5 tap FIR pre-distorts the pulse — pre-/post-cursor de-emphasis, paid in launch swing, *not* noise. Best at pre-cursor ISI the DFE can never see.
- CTLE (receiver front-end): a low-power analog boost that flattens the gross channel roll-off across the band. Catches what a continuous linear stage can, but caps out when amplified noise eats the margin.
- DFE (receiver, before the slicer): a feedback loop that subtracts the post-cursor ISI of already-decided bits with zero noise amplification — the muscle that opens the last of the eye. Mind error propagation and the first-tap timing race.
- Adaptation: hardware continuously re-tunes every CTLE pole and FFE/DFE tap to track temperature, voltage and aging — this is what 'link training' negotiates at power-on.
And how do you *know* it worked? You read the eye diagram — the same eye that rung 2 taught you to draw and that ISI slammed shut at the top of this guide. Before equalization the eye is a closed smear, height ≈ 0, and the bit error rate is hopeless. After CTLE + DFE the eye yawns open: tall enough for voltage margin (you can tell a 1 from a 0), wide enough for timing margin (the sampling clock can wander and still land inside). The on-chip eye monitor literally measures that opening and feeds the adaptation loop. A reopened eye is the whole point — the visible proof that you undid the channel.