Rejecting what's common
Imagine two friends standing on a trampoline, and you only care about the *gap* between their heads. If someone bounces the whole trampoline, both heads rise and fall together — but the gap between them barely changes. Measure the gap and the bounce simply disappears. That trick — caring about the difference between two signals and ignoring whatever they share — is the single most important idea in analog IC design.
Real chips live in a hostile world. Power-supply ripple, substrate noise, temperature drift, and pickup from nearby digital clocks all push on your circuit. The cruel part is that most of this junk arrives equally on every nearby wire — it is *common* to them. So instead of asking a circuit to amplify one voltage against a fixed ground (which would amplify the noise too), we feed it two voltages and ask only one question: *how far apart are they?* The shared garbage rides on both inputs and cancels.
The differential pair
Here is the circuit that does it. Take two matched MOSFETs and tie their sources together. Underneath that joined node, hang a tail [[current|current]] source — a fixed budget of current, say 100 µA, that the pair must share. The two gates are your inputs; the two drains are your outputs. This is the differential pair, and almost every op-amp, comparator, and data converter on Earth starts with one.
The tail is the whole point. Because the total current is *fixed*, the only freedom the pair has is how to split it. Make one gate slightly higher than the other and current tilts toward that side — more out of one drain, exactly that much less out of the other, like a seesaw with a fixed total weight. Raise *both* gates together (a pure common-mode move) and the split does not change at all: each side still draws its half. The pair literally cannot see a signal both inputs share — that is rejection built into the physics, not bolted on afterward.
How hard does the current tilt for a given nudge? That sensitivity is the transconductance, gm — output current per input volt — and it sets the gain. For a MOSFET biased in saturation, gm depends on how hard you drive it above threshold (the overdrive, Vov), and it is cheapest to remember in terms of the bias current the device already carries:
gm = 2 * Id / Vov ; transconductance from the bias point ; Id = drain (bias) current through one side ; Vov = Vgs - Vth (overdrive), how hard the device is turned on ; small overdrive -> larger gm for the same current (efficient)
From diff pair to op-amp
A bare diff pair tilts current, but you want a voltage out, and you want lots of gain. Two moves finish the job. First, you need to turn that two-sided (differential) current into one single-ended voltage. The elegant trick is an active load: cap the two drains with a current mirror. A mirror copies the current from one side and forces it onto the other, so the two halves *add* instead of fighting — you collect the full differential signal on a single output node, for free.
Second, that output node has a high resistance to ground (the transistors' output resistance, ro). Gain is just transconductance working into that resistance: the signal current gm·vin develops a voltage across ro. So a single stage delivers roughly gain = gm · ro, the device's *intrinsic gain* — often only 20 to 40 (a few tens), which is nowhere near enough for precision work. Each stage you cascade multiplies the gain, which is why one diff pair is rarely the whole story.
Av(single stage) = -gm * ro ; magnitude gm*ro = intrinsic gain (tens to ~hundreds) ; gm = transconductance (signal current per input volt) ; ro = output resistance of the stage (how much voltage that current builds) ; the minus sign: a common-source stage INVERTS
Stack the diff pair's output onto a second amplifying stage and you have the skeleton of an operational amplifier: an amplifier with enormous gain, two inputs (+ and −), and one output. The whole reason we want gain that huge is so we can throw most of it away with negative feedback — trading raw gain for precision, predictability, and a closed-loop response set by resistor ratios instead of fickle transistor parameters. (That feedback story is the next rung.)
The two-stage op-amp
The classic, textbook op-amp is built from exactly two amplifying stages you have now met. Stage one is the differential pair with a current-mirror load: it does the differencing, the common-mode rejection, and a first helping of gain. Stage two is a common-source amplifier — a single transistor that takes stage one's output and multiplies it again, while swinging the output close to the rails. Two stages of gm·ro multiplied together easily reach an open-loop gain of 1,000 to 100,000 (60 to 100 dB).
But two high-gain stages stacked back-to-back are dangerous. Each stage adds delay (a phase lag), and once you wrap the loop with feedback, enough lag can turn the helpful negative feedback into *positive* feedback — and the amplifier oscillates instead of settling. The fix is frequency compensation: a small capacitor (Cc) bridged across the second stage. Through the Miller effect it behaves like a much larger capacitor, deliberately slowing the amplifier so its gain falls below 1 before the phase lag becomes fatal.
That same compensation capacitor sets the amplifier's speed. With Miller compensation the gain-bandwidth product (GBW) is set by the input pair's transconductance divided by that capacitor — gm1 / (2π·Cc). And there is a second speed limit hiding here: how fast the tail current can charge Cc caps the output's maximum rate of change, the slew rate (roughly I_tail / Cc). Small signals obey the GBW; big steps hit the slew limit first.
.ac dec 20 1 1G ; small-signal gain & phase vs frequency (1 Hz -> 1 GHz) .op ; check the DC bias point: is the tail splitting evenly? ; read off the .ac plot: ; DC gain = gain at low frequency (the 60-100 dB plateau) ; GBW = frequency where gain magnitude crosses 0 dB (=1) ; PM = 180 deg minus the phase lag at that 0 dB crossing
Gain, swing & the spec sheet
An op-amp's datasheet is a contract, and a handful of numbers tell you almost everything. Open-loop gain (A_OL) is the raw, no-feedback gain — those tens of thousands. It is huge on purpose: feedback will trade it away for accuracy, and the more you start with, the more precise the result. GBW tells you how that gain fades with frequency; gain and bandwidth trade off one-for-one, so an op-amp with 10 MHz GBW gives you a gain of 10 only up to 1 MHz.
Output swing is how close the output can get to the supply rails before the transistors leave saturation and the gain collapses — a part that swings to within 100 mV of each rail wastes far less of a 1.8 V supply than one that stops a volt short. Input offset voltage is the small built-in error from imperfect matching: feed both inputs the same voltage and a real op-amp's output is not quite centered, as if a few millivolts were secretly added at the input. Offset is dominated by mismatch and low-frequency 1/f (flicker) noise, while the broadband hiss floor comes from thermal noise (4kTR).
How well the pair rejects shared noise gets its own headline number: the Common-Mode Rejection Ratio (CMRR) — the ratio of differential gain to common-mode gain, in dB. A CMRR of 80 dB means the amplifier responds 10,000× more strongly to the difference you care about than to the junk both inputs share. It is the quantified payoff of everything the diff pair and good matching were built to do, and it is one reason analog signal-to-noise ratio survives in a noisy chip.
The op-amp as a block
Once you trust those few numbers, you stop thinking about the transistors inside. The op-amp becomes a reusable block — a triangle with two inputs and one output — that you wire into larger systems the way a digital designer instances an adder. The internal small-signal detail is real and it matters when you design or debug one, but day to day you reason about the block from its spec sheet, not its schematic.
And those blocks are *everywhere*. An ADC uses op-amps and comparators (a diff pair pushed to a hard decision) to sample and digitize. A DAC and a bandgap reference lean on them to hold steady voltages. Filters, sensor front-ends, and the loop filter inside a PLL are all op-amps in disguise. Learn this one block well and you have a master key to most of the analog chip.