Why silicon hit a wall
Everything in this track so far — the buck, the boost, the inverter — rested on one assumption: the switch is made of silicon. For sixty years that was simply true. Silicon is cheap, abundant, beautifully understood, and the IGBT and the power MOSFET built on it carried the entire industry. But by the 2010s designers kept slamming into the same three walls, and all three trace back to one number: silicon's breakdown field — the electric field its crystal can hold before it avalanches into a short — is only about 0.3 MV/cm.
That weak field forces a brutal trade-off. To block a high voltage, a silicon device needs a thick, lightly-doped drift region — and that thick region adds resistance, which means heat. To hold off 650 V, a silicon MOSFET wears a drift layer tens of microns thick. Worse, silicon's high-voltage answer, the IGBT, cheats around the resistance problem with a flood of minority charge carriers — but those carriers can't be swept out instantly, so when you turn the IGBT off it bleeds a lazy current tail for a microsecond or more. That tail is wasted energy on every single switching event, and it caps how fast you dare to switch.
Wide-bandgap: crystals that don't break
A semiconductor is defined by its bandgap — the energy an electron must gain to jump from sitting still (the valence band) to roaming free and carrying current (the conduction band). Silicon's gap is 1.1 eV. Silicon carbide's is about 3.3 eV; gallium nitride's about 3.4 eV — three times wider, which is why we call them wide-bandgap devices. A wider gap means it takes a far stronger electric field to rip the crystal apart, so the breakdown field leaps roughly tenfold: from 0.3 MV/cm in silicon to around 3 MV/cm in SiC and GaN.
Ten times the field changes everything downstream. To block the same 650 V, a wide-bandgap drift region can be roughly ten times thinner and far more heavily doped — so for the same blocking voltage you get dramatically lower on-resistance, often a tenth or less of silicon's. Lower resistance means less heat while conducting. And because SiC and GaN carry current with majority carriers only (no minority-carrier flood like the IGBT), they switch off cleanly with no current tail — the lazy microsecond simply vanishes. Less conduction loss, less switching loss, all at once.
WHY WIDE-BANDGAP WINS (650 V class, same job) Property Silicon (Si) SiC / GaN ----------------------------------------------- Bandgap 1.1 eV ~3.3 eV Breakdown field 0.3 MV/cm ~3 MV/cm (10x) Drift region thick ~10x thinner On-resistance (Rds) baseline ~1/10 Turn-off tail yes (IGBT) none Practical switching ~20 kHz 100 kHz - few MHz Junction temp limit ~150 C 200 C+ Net effect: lower conduction loss + lower switching loss -> push fSW up 5-10x -> L and C shrink ~10x -> the whole converter gets smaller, lighter, cooler.
The bill for speed: faster edges, louder noise
There is no free lunch, and wide-bandgap's bill is written in physics. The same property that makes these devices wonderful — they snap between off and on in nanoseconds — is exactly what makes them dangerous. A GaN device can swing 400 V in under 5 nanoseconds. That is a slew rate of roughly 80 volts per nanosecond, or 80,000 volts per microsecond, a cliff edge of voltage where silicon offered a gentle ramp. Two ghosts haunt those razor edges.
The first ghost is electromagnetic interference (EMI). A Fourier view tells you that a steep edge is a chord of very high frequencies stacked together — the faster the rise time, the higher the frequencies it contains. An 80 V/ns edge sprays energy well past 100 MHz. That energy doesn't stay politely inside the converter: it couples into nearby traces and rides out along the input and output cables as a tiny radio transmitter, corrupting Wi-Fi, AM radio, sensor readings, and — critically — failing the legal EMI limits (FCC, CISPR) that every product must pass before it can be sold.
The second ghost is ringing and overshoot. Every wire and bond has a sliver of stray inductance, and at 80 V/ns the rate of current change is so violent that even a few nanohenries develop dangerous spikes (V = L·di/dt). Combined with stray capacitance, the circuit rings like a struck bell at hundreds of MHz, and the overshoot can punch a 650 V device past its rated voltage and destroy it. This is why wide-bandgap layout is a discipline of nanometres and nanohenries — keep the loop tiny, keep the inductance lower than silicon ever forced you to.
WHY A STEEP EDGE = WIDEBAND NOISE
Silicon edge (slow): GaN edge (fast):
V V
| ____ | ____
| / | |
| / | |
| / | |
|/____________ t |___|________ t
~50-100 ns ~2-5 ns
rise time tr -> energy spreads up to ~ 0.35 / tr
tr = 100 ns -> noise out to ~3.5 MHz
tr = 3 ns -> noise out to ~120 MHz (!!)
Same volts, same job -- but the fast edge dumps
its energy across a FAR wider band of frequencies.Taming EMI: control the edge, then filter the rest
The engineer's answer to EMI is a layered defence, and the very first layer is the one you already met: the gate driver. Recall that the gate driver is the muscle that charges and discharges the switch's gate capacitance to turn it on and off. How *fast* it does that sets the slew rate — and so the EMI. Make the driver dump charge instantly and you get a blistering, noisy edge; deliberately slow it with a larger gate resistor and you soften the edge, trading a hair of switching efficiency for a big drop in high-frequency noise.
This is the central tension of frontier design stated as a knob: slew control. Too fast, and you fail EMI compliance and risk destructive ringing. Too slow, and the switch lingers in its lossy half-on transition, throwing away the very efficiency wide-bandgap promised. The best modern gate drivers don't even pick one speed — they shape the edge, driving hard through the safe middle and easing off near the rails, or splitting turn-on and turn-off with separate resistors. The slew rate stops being an accident and becomes a designed quantity.
- Shape the edge at the source. Tune the gate resistor (and use a driver that shapes turn-on/turn-off separately) to make the edge as slow as EMI demands but no slower — the cheapest decibels of noise reduction you'll ever buy.
- Shrink the switching loop. Lay out the high-di/dt loop (switch, diode, capacitor) as tightly as physically possible to starve the stray inductance that feeds ringing and radiation. On wide-bandgap boards, millimetres matter.
- Decouple locally. Place decoupling capacitors right at the device to give the fast current a short local path home instead of a long, antenna-like loop — the heart of EMI decoupling.
- Filter at the boundary. Add an input EMI filter (common-mode chokes and X/Y capacitors) so whatever noise remains is trapped inside the box and never reaches the mains cable to be measured — or to bother the neighbours.
Power factor: drawing polite current from the grid
Now turn from the device to the wall socket. Plug a cheap switched-mode power supply into the mains and you'll find it commits a quiet crime against the grid. The classic front end is a rectifier feeding a big capacitor. That capacitor only sips current near each AC voltage *peak*, when the line briefly rises above the capacitor's charge — so instead of a smooth sine, the supply gulps the line current in narrow, violent spikes twice per cycle. Same average power, but an ugly, spiky waveform.
Power factor measures how honestly your current waveform matches the voltage. A resistive heater draws a perfect sine in step with the voltage: power factor 1.0, the gold standard. The spiky rectifier draws maybe 0.5–0.6 — meaning it forces the utility to deliver nearly twice the *current* for the same useful watts. Why do utilities care? Because that extra current heats up their wires and transformers for nothing, and the spiky harmonics distort the grid voltage for everyone else on the line. Multiply by millions of chargers and it's a real problem — which is why standards like IEC 61000-3-2 legally cap the harmonics a product may inject.
PASSIVE RECTIFIER vs ACTIVE PFC line current
AC line voltage: ___ ___
v(t) .--' '--. .--' '--.
/ \ / \
Bad (rectifier+cap): Good (active PFC):
i(t) i(t)
| || .--' '--.
| || || / \
___|___||______||___ / \___
spikes at peaks smooth sine, IN PHASE
PF ~ 0.5 PF ~ 0.99
Same average power. PFC reshapes the CURRENT so
the supply looks, to the grid, like a pure resistor.Active PFC: a boost converter as a grid-polishing machine
Here is where the whole track snaps together. The fix for bad power factor is active power factor correction (PFC), and its workhorse is a circuit you already know cold: the boost converter. The trick is to run the boost not at a fixed output, but as a *current shaper*. A control loop measures the instantaneous rectified line voltage and commands the boost to draw input current that tracks it — moment by moment, the converter pulls current in the exact shape of the voltage sine. To the grid, the supply now looks like a clean resistor: power factor near 0.99.
Why a boost specifically? Two reasons make it the natural choice. First, a boost has an inductor in *series* with the input, and an inductor's current can't jump — so it inherently draws smooth, continuous current rather than spikes, exactly the polite behaviour we want. Second, boosting up to a high, stable DC bus (typically ~400 V) gives every downstream stage a clean, regulated rail to work from, regardless of whether the mains is a sagging 100 V in Japan or a 240 V line in Europe. The PFC boost is the universal-input doorman of nearly every serious AC-fed power supply.
And here the two frontier themes meet in one beautiful tension. Switching the PFC boost faster — with wide-bandgap devices — lets its inductor shrink and its efficiency climb past 99%. But those same fast edges threaten the very EMI limits the PFC stage exists to help you pass. So the frontier engineer is forever balancing on a knife: push the switching frequency up for size and efficiency, then spend that headroom on slew control and filtering to stay quiet and legal. Master that balance and you've mastered the modern art of power electronics.