Under the hood: how SPICE actually solves your circuit
In guide 2 you learned that a netlist is just a list of components and the nodes they connect to. Here is what SPICE does with it. At every node it writes down Kirchhoff's current law — the plain bookkeeping that all the current flowing into a node must flow back out — which turns your whole circuit into one big system of simultaneous equations, one per node. This is exactly the nodal analysis you did by hand on a three-resistor circuit two rungs ago, just done by a machine on thousands of nodes at once. Solving that system is a matrix calculation, and the reference node 0 is what gives every voltage something to be measured against.
If your circuit were only resistors and sources, those equations would be linear and SPICE would crack them in a single clean shot. But the moment a diode or a transistor enters, the equations turn curvy — that exponential diode I-V and the transistor's bent characteristic from guide 4 are nonlinear, and there is no one-step formula for them. So SPICE does what you would: it guesses an answer, plugs it in, sees how badly the books fail to balance, nudges the guess, and tries again. That repeated nudging is the Newton-Raphson iteration, and convergence is the happy moment when two successive guesses agree to within a tiny tolerance and stop moving. A solved operating point is simply a guess that finally held still.
When DC won't settle: operating-point trouble
Almost every analysis begins by finding the DC operating point, and that is where the most failures live — because it is a pure cold-start nonlinear solve, with no gentle ramp to ease the solver in. The single most common blunder SPICE catches for free is a floating node: a node with no DC path to ground at all. A capacitor-coupled input with nothing else on it, an op-amp output left dangling, a transistor base with no bias resistor, or simply forgetting to connect node 0 — any of these leaves a voltage the equations cannot pin down, and SPICE reports a "singular matrix." That error is a gift: it has found a real wiring mistake in seconds, for the price of zero solder.
When the netlist is sound but the solver still gives up, you coax it. Three classic aids do almost all the work. gmin stepping quietly hangs a tiny conductance from every node to ground so the matrix is never singular, solves that easy version, then peels the conductance away. Source stepping ramps your supplies up from zero, letting the solution drift smoothly from the trivial all-zero state to the real one. And a hand-supplied hint — a `.nodeset` or `.ic` that tells SPICE roughly what a node voltage should be — hands the solver a foothold near the answer so its first guess is not wildly off. None of these change your circuit; they only change where the search starts.
- Read the error and the node it names. SPICE usually prints the offending node number; trace it back through your netlist before changing anything.
- Hunt for a floating node. Does every node have a DC path to ground? A node touching only capacitor plates and nothing resistive is the usual culprit; add a large resistor (say 1 Mohm to 1 Gohm) to ground there.
- Confirm node 0 exists and is connected. The reference node is not optional; without it the whole matrix has nothing to lean on.
- Turn on the convergence aids. Enable gmin stepping and source stepping, then re-run. Most stubborn DC solves give in right here.
- If it still fails, seed it. Add a .nodeset or .ic near where you expect the answer, and suspect a bad or overly idealized device model before blaming the simulator.
When transient stalls: the time step
A transient analysis walks forward through time in tiny slices, solving the whole operating point afresh at each one. The slice width is the time step, and SPICE sizes it adaptively: it shrinks the step to crawl carefully through a fast edge, then stretches it again to stride across calm stretches and save effort. The dreaded "timestep too small" error means the solver kept shrinking, trying to follow some event, until the step collapsed toward zero and it threw up its hands. It is the transient cousin of a DC non-convergence: the math, not your design, has hit a wall.
The usual cause is an impossibly clean ideal: a voltage source with a zero-rise-time edge, a loop with literally zero resistance, or a model with a sharp kink the solver cannot follow. The cure is delightful because it makes the sim both happier and more honest — add the real parasitics that exist anyway. A few picofarads of stray capacitance, a few nanohenries of lead inductance, a small series resistance: these round off the impossible corners so the step has something finite to track, and they nudge your idealized schematic a little closer to a real board. Loosening the relative tolerance (`reltol`) a touch can help too, though that trades a sliver of accuracy for the rescue.
SYMPTOM (what SPICE says) LIKELY CAUSE FIRST THING TO TRY
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"singular matrix" a node with no DC path add a big R (1e9) to
to ground (floating) ground; check node 0
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"no convergence in DC hard nonlinearity, a enable gmin stepping +
operating point" bad starting guess source stepping; give
a .nodeset / .ic hint
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"timestep too small" / an ideal infinitely- add real parasitics:
transient stalls fast edge or a glitchy a few pF / nH, a small
model series R; relax reltol
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it runs, but the result is wrong model, or a too- tighten reltol; re-check
subtly, plausibly wrong loose tolerance the model & the op pointConverged is not the same as correct
Here is the deepest pitfall in the whole rung, and it is the opposite of a crash. A sim that runs clean and draws a smooth, confident curve feels authoritative — but convergence only proves the math is self-consistent, never that it matches reality. Garbage in, garbage out: a wrong model, a typo turning 10 kohm into 10 ohm, or a tolerance left so loose the solver settles for a sloppy answer will all produce a beautiful, completely false graph. The smoother and prettier the result, the more careful you must be, precisely because it invites your trust.
One result is also just one roll of the dice. A circuit that works at the typed-in nominal values may collapse once real tolerances and temperature spread are in play. This is what the orientation-level analyses from earlier are for: a parameter sweep walks a value across its range to show how a result bends, and a Monte-Carlo analysis rolls every component within its tolerance hundreds of times to reveal whether your design has comfortable margin or is balanced on a knife's edge. Trusting a result means asking not just "does it work?" but "does it still work when everything is a little off?"
What simulation cannot see — and why you still build
Now the honest limit that closes this whole rung: SPICE sees your netlist, not your board. It has no idea where you placed a part, how long a trace is, or how big a current loop you drew, so it is blind to the things that wreck real fast and precise circuits — trace inductance, ground bounce, the loop area that radiates, the crosstalk between neighbours, and the stray capacitance of a breadboard that quietly ruins a high-speed or high-impedance design. On a real PCB the layout itself is a circuit element, and that element is simply absent from the schematic you simulated.
And a simulation is only ever as good as its models. The manufacturer SPICE model you trusted in guide 4 may omit temperature drift, aging, package parasitics, or the very corner you care about; a generic built-in model is a useful caricature, not the real part. So SPICE earns its keep not as an oracle but as a cheap, fast blunder-catcher: it will tell you in seconds that you forgot a ground, biased a transistor into the wrong region, or built a filter an octave off — the expensive-to-find-on-the-bench mistakes — long before you spend an afternoon soldering.
That is why the art of electronics is a loop, not a button. You design, you simulate to catch the cheap blunders, you build a prototype, and then you measure — meter in one hand, oscilloscope probe in the other — to catch everything the sim could not see. The bench will surprise you, and that surprise is data, not failure: it is exactly the layout, parasitic, and model reality that SPICE left out. The engineer who simulates and builds and measures, and lets each correct the others, is the one whose circuits work in the messy real world. Simulation is a magnificent first draft. It is never the published book.