A circuit, written down as text
The previous guide introduced SPICE as a virtual breadboard — a place to test a design before you reach for the soldering iron. But how does the program actually take your circuit in? Not as a picture. Underneath every tidy schematic on screen, SPICE reads a humble block of plain text called a netlist — literally a list of the net, one line for almost every component. Strip away the colourful drawing and this list is the real circuit, the only thing the engine ever sees.
Each line follows the same simple grammar: a name, then the nodes the part connects to, then a value. `R1 in out 10k` means a resistor called R1, wired between the node named `in` and the node named `out`, worth 10 kΩ. That is the entire idea. A whole amplifier or power supply is just a stack of lines like this. Notice what is missing: nowhere does SPICE care where a part physically sits, how long the wires are, or which way the board is turned. It cares only about what connects to what — the circuit's topology, nothing more.
Nodes: the dots where wires meet
A node is simply an electrical junction — any point where component leads are tied together by wire. Here is the part beginners trip over: everything joined by plain wire is electrically one and the same node, no matter how sprawling the drawing makes it look. A wire has no resistance in this idealized world, so two points connected by it sit at exactly the same potential and count as a single node. In the simplest run, SPICE's entire job is to find one number for each node: its voltage.
You give each node a label — a number like `3` or a friendly word like `in`, `out`, or `vcc`. The label is just a handle; the simulator does not care whether you call it `out` or `node42`, only which leads share it. And because a node voltage is the answer SPICE reports, choosing readable names (`base`, `collector`, `vmid`) makes the output a pleasure to read instead of a puzzle of bare integers.
One rule bites everyone eventually: every node needs a DC path to ground. If a node connects only through capacitors — say one plate of a coupling capacitor that leads nowhere else — then in steady DC the simulator has no way to fix its voltage, and you will meet the classic error *"node is floating"* or *"no DC path to ground"*. The cure is usually a large resistor to ground to tie the orphan down. It is not SPICE being fussy; a real such node would drift unpredictably too. The simulator is simply refusing to invent a number it cannot justify.
Ground: node 0, the chosen sea level
A voltage is never absolute. Just as a hill's height is meaningless until you name a sea level to measure from, a node's voltage means nothing until you pick a reference to measure against. That reference is ground — the one node we declare to be exactly 0 V, the zero of our whole map. Stick a probe between any node and ground and you read that node's voltage; ground is the silent partner in every measurement.
In SPICE this reference has a reserved name: node 0 (the digit zero). It is special and global — always exactly 0 V, shared across the whole netlist, and every circuit must have one. Make a ground node by simply connecting parts to node `0`. Crucially, which node you anoint as ground is a free choice, not a physical fact: the differences between nodes stay identical whatever you pick, the same way every hill keeps its shape whether you measure from sea level or from the valley floor. We choose the most convenient reference and let everything else be read against it.
Reading a real netlist
Let us read a complete, runnable netlist for a circuit you have known since the DC rung: a 9 V source feeding a voltage divider of 10 kΩ over 5 kΩ. Every idea from the last three sections appears here in five short lines.
* --- voltage divider: 9 V across 10k + 5k --- * element node+ node- value V1 in 0 9 R1 in out 10k R2 out 0 5k .op .end
Walk it line by line. The `*` lines are comments, ignored by the engine but priceless to a human. `V1 in 0 9` places a 9 V source between node `in` and ground (node 0). `R1 in out 10k` and `R2 out 0 5k` are the two divider resistors, sharing the node `out` in the middle. The names `in` and `out` we invented; node `0` is reserved. The `.op` is a dot-command — an instruction, not a part — asking for the DC operating point, the resting voltages with nothing changing. Finally `.end` marks the bottom of the deck. Run it and SPICE reports `out = 3 V`. In practice you rarely hand-type lists like this: you draw the schematic in a tool like LTspice or KiCad and the schematic-capture software writes the netlist behind the scenes — but reading one is exactly what lets you debug, by confirming that what you drew is really what SPICE sees.
- Name your nodes and decide which one is ground — that node becomes 0. Sketch the topology first so you know which leads share a node.
- Write one line per component: its name (right first letter!), its two nodes, then its value. Order between lines does not matter to SPICE.
- Include at least one source (a V or I line), or there is nothing to drive the circuit and every voltage solves to zero.
- Add a dot-command for the analysis you want — .op for the operating point now, .tran or .ac in the guides ahead — then close with .end and run.
Under the hood: from netlist to answers
How does SPICE turn that little list into voltages? With nodal analysis — the very same method you met by hand back in the DC rung, now done by machine and at enormous scale. The engine walks to each node and applies Kirchhoff's current law: the currents flowing in must equal the currents flowing out, because charge cannot pile up at a junction. Each component contributes a term linking its node voltages to the current through it. Stack one such equation per unknown node and you get a system of linear equations, which the computer solves as a matrix in one sweep.
Watch it work on the divider. There is only one unknown — the voltage at node `out` — because the source pins node `in` at 9 V and node 0 is fixed at 0 V by definition. KCL at `out` says the current arriving through R1 equals the current leaving through R2: (9 - Vout) / 10k = Vout / 5k. Cross-multiply: 5000 times (9 - Vout) = 10000 times Vout, so 45000 = 15000 times Vout, giving Vout = 3 V. That is exactly the divider shortcut 9 times 5/(10+5) = 3 V — and SPICE reached it with no shortcut at all, just KCL and arithmetic. The beauty is that the identical machinery handles ten thousand nodes the same way it handles one.
Now you can see why ground is structurally essential, not just convention. With N nodes you have only N - 1 unknowns, because fixing one node at 0 V anchors the whole system. Remove the reference and the equations become unsolvable: every voltage could float up or down together by any amount and still satisfy KCL, so there is no unique answer. That is the deep reason every netlist must contain node 0 — without an anchor, the matrix is singular and SPICE simply cannot solve it.
Pure resistor circuits like this give a single clean linear solve. The moment you add capacitors, inductors, and transistors, the equations turn nonlinear and have to be stepped through time, which is where convergence and the time step earn a guide of their own later in this rung. The three core analyses (DC, AC, transient) come next, and the device models that decide whether the answers mean anything follow that. The honest bottom line for now: nodal analysis lets simulation catch wiring blunders and topology errors cheaply, but its flawless idealized graph still cannot see your layout — so a sim complements building and measuring, it never replaces them.