Scaling, Level-Shifting, and Anti-Alias Filtering

Where this stage sits in the chain

Guide 3 left you with a triumph: an instrumentation amp that takes the bridge's tiny, floating, microvolt difference and turns it into a clean, ground-referenced voltage. But that voltage is not yet ready to be digitized. An analog-to-digital converter is fussy — it looks at the world through a fixed window, say 0 to 3.3 V, and it can only honestly capture frequencies below half its sample rate. Our amplified signal may swing over the wrong range, sit on the wrong DC level, and carry frequencies the converter cannot handle.

So everything between the in-amp and the converter does just three jobs, and the first two collapse into one tidy idea: an affine map, Vout = m times Vin + c. The slope m is scaling — a gain that stretches the signal to fill the window. The offset c is level-shifting — a slide that moves the signal's zero to where the window wants it. The third job is an anti-alias filter that strips out frequencies the sampler would otherwise mangle. Get m, c, and that filter right, and your sensor's full range lands cleanly on the converter's full range. This is the heart of signal conditioning.

Scaling: using every bit of the ADC

A converter chops its input window into 2^n tiny steps. A 12-bit ADC across 3.3 V has steps of 3.3 / 4096, about 0.8 mV each — that is its resolution. Now suppose your amplified signal only ever swings across a tenth of the window. You are then using only about 410 of those 4096 codes, and the other 3686 sit idle: you have quietly thrown away more than three bits before sampling even starts. Scaling fixes this — pick the gain so the largest expected signal nearly fills the window, and every code earns its keep.

Make it concrete. Suppose after the in-amp your signal swings 0 to 300 mV, and the ADC window is 0 to 3.3 V. You need a gain of about 11 to stretch 300 mV up to 3.3 V. A non-inverting amplifier does it: gain = 1 + Rf / Rin, so Rf = 100 k and Rin = 10 k gives 1 + 100/10 = 11, and 300 mV times 11 = 3.3 V. The full window is now in play, and your effective resolution jumps by more than three bits compared to leaving the signal small.

Two honest cautions keep scaling from biting back. First, leave headroom: do not aim for exactly full scale. Signals overshoot, offsets drift, and real op-amps cannot quite reach the rails, so aim for maybe 80 to 90 percent of the window. Clipping a peak is unrecoverable — far worse than wasting a few codes. Second, gain amplifies noise just as faithfully as signal; it cannot improve the signal-to-noise ratio that the sensor and in-amp already set. Scaling makes the signal the right size for the bits; it does not add accuracy the upstream chain never had.

Level-shifting: sliding the zero into the window

The offset c is the trickier of the two numbers, and it matters because so many real sensors give a bipolar signal — one that swings both above and below zero. A load cell pushed one way and pulled the other, a microphone, a Hall sensor reading field in two directions: all produce voltages that go positive and negative. But a single-supply ADC only accepts 0 to Vref. Feed it a negative input and, at best, it clamps to zero and you lose half your signal; at worst you stress the input. Level-shifting slides the whole signal up so its zero lands at mid-scale, safely inside the window.

The cleanest tool adds a stable DC level. A difference amplifier has a reference pin that sets exactly where zero input appears at the output: tie that pin to Vref/2 and a signal swinging plus or minus 1 V becomes 0.65 to 2.65 V, centred in a 3.3 V window. A summing amplifier does the same by adding your signal to a DC term. Either way, the DC level must come from a stable voltage reference — if the level you shift to wanders, your zero wanders with it, and that error pretends to be real signal.

Two-point map:  sensor span   ->   ADC window
   Vin_min = -1.00 V    ->    0.10 V    (leave 10% headroom at bottom)
   Vin_max = +1.00 V    ->    3.20 V    (use ~90% of a 3.3 V ADC)

   slope  m = (3.20 - 0.10) / (1.00 - (-1.00)) = 3.10 / 2.00 = 1.55
   offset c = 0.10 - m*(-1.00)            = 0.10 + 1.55  = 1.65 V

   ==>  Vout = 1.55 * Vin + 1.65
        ( gain 1.55, signal now centred at 1.65 V = mid-scale )

   Build it with a difference amp:  R2/R1 = 1.55,  reference pin = 1.65 V

Sometimes the offset is the enemy, not the goal. A bridge has a small built-in imbalance even at rest, the in-amp adds its own input offset voltage, and many sensors sit on a baseline you simply do not care about. Subtracting a DC level — the same difference-amp trick, or a small DAC nudging the reference, or a digital tare in software — removes that pedestal so you can crank up gain without the offset itself clipping. The honest caveat: an offset that drifts with temperature cannot be cancelled once and forgotten. Tracking that drift is the business of calibration, which is guide 5.

Anti-alias filtering: the wall before the sampler

One job remains, and it is the one you cannot skip or patch up afterwards. Sampling at a rate fs can only faithfully represent frequencies below fs/2 — the Nyquist limit, the single most important number in the whole digitizing story. Anything above fs/2 does not simply vanish. It folds back down and disguises itself as a lower frequency, landing right on top of your real signal where you can never tell them apart. This folding is called aliasing, and the rule that sets the limit is the Nyquist sampling theorem.

Here is the crucial honesty: once a signal has aliased, no filter, no DSP, no clever maths afterwards can ever separate it from the real signal, because they now occupy the very same frequency. The only cure is prevention — you must remove those high frequencies with an analog low-pass filter placed BEFORE the sampler. That filter is the anti-alias filter, and it is the last analog component before the converter for a reason: it is the gatekeeper that decides what the ADC is ever allowed to see.

1. Find the highest frequency you actually care about — your signal band. Say a sensor whose useful content tops out at 1 kHz.
2. Do NOT pick the bare Nyquist minimum. Sampling that 1 kHz signal at just 2.5 kHz forces the filter to drop like a cliff between 1 kHz and 1.25 kHz — an impossibly sharp wall (remember from the filter rung: there are no brick walls).
3. Oversample instead. Choose fs about ten times the band — 10 kHz — so fs/2 sits at a comfortable 5 kHz, a wide gap above your 1 kHz content. Now a gentle filter has room to do its job.
4. Design the low-pass with its corner just above the band (say 1.2 to 1.5 kHz) and enough order to be well-attenuated by fs/2. A second-order Sallen-Key at 40 dB/decade gives roughly 24 dB of rejection by 5 kHz; a fourth-order gives about 50 dB.
5. Check the attenuation at fs/2 against your resolution. To protect 12 bits you want roughly 72 dB down there; if a fourth-order filter is not enough, oversample harder or add order — that is the genuine cost of a clean conversion.

Ratiometric measurement and what really sets accuracy

One elegant trick ties the whole chain together. The ADC does not measure absolute volts; it measures your signal as a fraction of its own reference voltage. So if your resistive sensor — a bridge, an RTD divider, a potentiometer — is excited from that SAME reference, any drift in the reference cancels exactly. The excitation rises, the signal rises in proportion, and the ratio the converter reports does not budge. This is ratiometric measurement, and it turns the stability of the reference from a nagging worry into a non-issue.

There is still loading to respect at the very end. The in-amp's high input resistance protected the fragile bridge; now the converter itself becomes the load. A SAR ADC in particular has a switched-capacitor input that yanks a gulp of charge from your signal at the instant of each sample, and if the stage driving it is not low-impedance and fast enough to settle in time, the reading droops. The fix is a dedicated op-amp buffer sitting right at the ADC input, stiff and quick — yet another reminder that ignoring the loading effect quietly corrupts a measurement that looked perfect on paper.

Stack it all up and the honest picture comes into focus. The converter's 12 or 16 bits are a ceiling, never a floor. Sensor noise and nonlinearity, the bridge's offset drift, the in-amp's offset and noise, your scaling and level-shift errors, reference drift, and an imperfect anti-alias filter all eat down from that ceiling. The honest figure of merit is the effective number of bits — what you actually get after the real world has had its say. A clean 12-bit front end beats a sloppy 16-bit one every time. Design the whole signal chain as one thing, and remember the last mile — turning a faithful number into a correct one through linearity and calibration — is guide 5.