Stability: When Feedback Bites Back

The thermostat that arrives too late

Guide 1 of this rung showed that negative feedback is the engine of a good op-amp circuit: the amplifier compares its output against the target and forever nudges the difference toward zero, like a thermostat. Guide 3 then showed that no amplifier is infinitely fast — its gain rolls off with frequency, and rolling off always drags the signal's timing behind. Put those two facts together and a danger appears. Feedback works by subtracting a delayed copy of the output. If the delay grows large enough, the copy that should subtract ends up arriving a half-cycle late — and a half-cycle-late subtraction is an addition.

So an amplifier can oscillate when two things happen at the same frequency: the loop gain is still 1 or more (there is enough signal going round the loop to sustain itself), and the total phase lag around the loop has grown to about 180 degrees (the correction now adds instead of subtracts). Feedback already builds in a deliberate 180-degree inversion at the summing junction; pile another 180 degrees of lag on top from the amplifier's roll-off and you have a full lap — the snake eats its tail. Stability is therefore a race: does the loop gain fall below 1 before the phase lag reaches that fatal point?

The Bode picture: where the curves cross

The cleanest way to see the race is on a Bode plot — gain in decibels against frequency on a log axis. Draw two curves. The open-loop gain starts huge and rolls off at -20 dB per decade past its dominant pole. The closed-loop gain you designed (say 1 + Rf/Rin) is a flat horizontal line. Here is the key insight from guide 1, drawn as a picture: the loop gain is simply the vertical gap between the two curves. Lots of gap means lots of feedback correcting your errors; where the gap closes to zero, the loop gain has fallen to 1, and that frequency — the crossover frequency — is where stability is decided.

 gain (dB)
  100 +**.                         A(f): open-loop gain
      |   '*.       slope -20 dB/decade (one pole)
   60 +      '*.
      |         '*.
   40 +- - - - - -'*.- - - - - -   closed-loop gain = 1 + Rf/Rin = 100x
      |              '*.           (loop gain = the GAP between curves)
    0 +-----------------'X-------  loop gain = 0 dB (crossover, fc)
      +----+----+----+----+----+--> freq (log)
        10  100   1k  10k  100k 1M

  at fc only the dominant pole acts  ->  ~90 deg lag
  phase margin = 180 - 90 = 90 deg          (rock solid)
  a 2nd pole near fc -> 135..180 deg lag -> ring -> oscillate

Put real numbers on a typical part. Say its DC open-loop gain is 100 dB (about 10^5) and its gain-bandwidth product is 1 MHz, with a dominant pole near 10 Hz. If you build a gain of 100 (40 dB), the two curves meet where the open-loop curve has fallen from 100 dB to 40 dB — that is 1 MHz / 100 = 10 kHz. At 10 kHz the amplifier is far past its single dominant pole but (we hope) before any second pole, so it contributes only that one pole's 90 degrees of lag. Loads of room before 180 degrees. Calm.

Phase margin and gain margin: the safety cushions

We can turn "calm" into a number. The phase margin is how much cushion you have left at the crossover frequency: take 180 degrees and subtract the actual phase lag there. In the example above, 180 - 90 = 90 degrees of phase margin — enormous. Its partner, the gain margin, looks at it the other way: at the higher frequency where the phase lag does hit 180 degrees, how many dB has the loop gain already fallen below 1? Both are measuring the same gap between you and the edge; phase margin is usually the one engineers quote.

Now the rules of thumb, which map straight onto how a step response looks on a scope. About 90 degrees (a single-pole loop) is rock solid with no overshoot. Around 60 degrees is the sweet spot — fast, with little or no ringing. At 45 degrees the step response shows visible overshoot and a couple of cycles of ringing that die out. Below roughly 30 degrees the ringing gets ugly and slow to settle. At 0 degrees the cushion is gone: the loop sustains a steady wobble forever — full oscillation. These are guidelines, not laws, but they are the language people use to judge a loop.

Here is the gift that surprises beginners: a higher closed-loop gain is more stable, not less. A higher flat line sits up nearer the open-loop curve, so the two meet at a lower crossover frequency — where less phase lag has had time to pile up, leaving a bigger phase margin. The hardest case of all is the unity-gain voltage follower (gain 1, the 0 dB line): it crosses at the highest possible frequency, right out at the gain-bandwidth product, where the most lag has accumulated. That is exactly why datasheets boast that a part is "unity-gain stable" and why innocent-looking followers are the usual oscillation victims.

When feedback bites: the capacitive-load trap

The classic ambush is a capacitive load — a long cable, a scope probe, a piezo, a stack of inputs. The op-amp has a real output resistance Rout, and Rout together with the load capacitance Cload forms an RC, which is a brand-new pole sitting inside the feedback loop at f = 1/(2 times pi times Rout times Cload). Suppose Rout is 80 ohm and Cload is 10 nF: f = 1/(2 times pi times 80 times 10x10^-9) which is about 200 kHz. For a follower whose crossover is up near 1 MHz, that 200 kHz pole sits well below crossover, so it stacks roughly another 90 degrees of lag onto the dominant pole's 90 — the phase margin collapses toward zero, and the amplifier rings or oscillates.

On the bench you read it straight off a scope. Feed a square wave and watch the edges: a few cycles of decaying wobble means low-but-alive phase margin (maybe 20 to 40 degrees); a steady sine at hundreds of kHz to megahertz that you never asked for means the cushion is gone and the circuit has become an oscillator. That is no coincidence — loop gain of 1 with a full 360 degrees of phase around the loop is precisely the Barkhausen criterion, the recipe a deliberate oscillator is built to satisfy. An unstable amplifier is simply an oscillator you did not mean to design. The deadly Cload often hides in plain sight: a long coax, the probe itself, or a breadboard's stray capacitance can each supply it.

Taming it: compensation and practical fixes

The cure is always to restore phase margin, by one of two strategies: make the loop gain fall faster so it crosses sooner (before the lag builds), or move the troublesome pole out of the way. The umbrella term is frequency compensation. Most general-purpose op-amps are internally compensated — the maker builds in one dominant pole so the part is unity-gain stable straight out of the tube. You pay for that safety with bandwidth, the very gain-bandwidth tradeoff from guide 3. When you cause the instability, here is the practical toolkit.

1. Run more gain if the application allows. A higher closed-loop gain crosses lower on the Bode plot, buying phase margin for free — the simplest fix of all.
2. Isolate a capacitive load with a small series resistor (often 10 to 50 ohm) between the output pin and Cload. This pushes the load pole outside the feedback loop so it no longer eats your margin; the cost is a little voltage droop into the load.
3. Add a small feedback capacitor across Rf (often just a few pF). It introduces phase lead near crossover that cancels some of the lag — gentle in-loop compensation, also handy to flatten the peaking from input capacitance.
4. Decouple the supply pins. Put a decoupling capacitor right at each rail pin; without it, supply-line sag and inductance can sneak feedback through the power rails and trigger a baffling oscillation. Think of it as a local water tank beside a thirsty chip.
5. If it is still marginal, change the part. Pick an op-amp specified to drive capacitive loads, or one with a healthier phase margin or a minimum stable gain that suits your design.

One honest closing caveat: check the loop, do not guess at it. A SPICE AC analysis can plot the loop gain and let you read the phase margin straight off — but a simulation is only as trustworthy as its device model, and it cannot see your layout's stray capacitance and inductance, which on a real PCB are themselves circuit elements (and a breadboard is far worse). So simulate to get close, then confirm on the bench with a scope step-response. The 45-to-60-degree targets are sound rules of thumb, not laws of nature: aim for the margin, then go and prove it.