From signal switch to power switch
Guide 1 introduced the MOSFET as a voltage-controlled switch — push the gate above the threshold and the channel turns on. But a logic-level switch handles milliamps. A power MOSFET is the very same idea scaled up to carry tens of amps and block tens or hundreds of volts. The trick is geometry: instead of a thin surface channel, current runs vertically down through the whole thickness of the chip, so the conducting path is enormously wide. That wide path is what makes the on-state resistance so low.
A switched-on power MOSFET is not a perfect short — it is a small resistor, the on-resistance Rds(on), often just a few milliohm. Whenever current flows, that resistance burns conduction loss: P = I^2 times Rds(on). Push 10 A through a 10 milliohm device and it dissipates 10^2 times 0.01 = 1 W just sitting there fully on. Two honest cautions: Rds(on) rises with temperature (it roughly doubles from 25 C to 125 C), and the datasheet value is quoted at a specific gate voltage — under-drive the gate and the resistance climbs. So you always want the gate driven hard and fully on.
The gate is a capacitor — gate charge
Electrically, the gate is a tiny capacitor: a metal plate separated from the channel by a sliver of oxide. At DC it draws no current, which is wonderful. But to change the gate voltage you must move charge onto or off that plate — and a power MOSFET's gate is a fat capacitor. The number to watch is not capacitance but total gate charge Qg, in nanocoulombs: the charge needed to swing the gate from fully off to fully on. Think of it as a small bucket you must fill (turn on) and empty (turn off) on every single switching cycle.
And the bucket fills unevenly. The gate-charge curve has three stages: first Vgs rises to the threshold (nothing happens at the drain yet); then it stalls on a flat shelf called the Miller plateau while the drain voltage swings across — here the gate-drain capacitance is charging, and the device is half-on, carrying full current with significant voltage across it; finally Vgs climbs the rest of the way to full enhancement. That plateau is the dangerous neighbourhood: the part is dissipating hard, so you want to rush through it as fast as you can.
Vgs ^ | _______ Vdrive (fully ON) | / | Miller plateau _____/ <- final rise to full enhancement | (Vgs flat) ____/ | _____/ <- here the DRAIN voltage collapses | / (gate-drain capacitance charging) | ___/ <- Vth reached: drain current starts | / +--+---------+----------+-----> gate charge Q delivered (nC) 0 Qgs Qgd Qg(total)
Why a logic pin cannot drive it — the gate driver
Here is where beginners get burned. Switching fast means delivering Qg fast, and current is charge per time: the average gate current is I_gate = Qg / t. Say Qg = 50 nC and you want to switch in t = 50 ns. Then I_gate = 50 nC / 50 ns = 1 A — a one-amp surge, just to flick the gate. A microcontroller pin can source maybe 20 mA, so it would take 50 nC / 20 mA = 2.5 us to charge that gate: fifty times slower, and the device crawls through the lossy Miller plateau the whole time. Wire a power MOSFET straight to a logic pin and it will switch slowly, run hot, and may die.
The fix is a gate driver: a little push-pull buffer (a totem-pole of complementary devices, or a dedicated chip) sitting between your control logic and the gate. It takes the feeble logic signal and answers with an amp or more, sourcing current to slam the gate up and sinking it to yank the gate down. Because that surge is huge and brief, the driver needs its own stiff supply with a decoupling capacitor right beside it — a local water tank so the gate gulp does not sag the rail. A small series gate resistor is often added too, to deliberately slow the edge a touch and tame ringing, trading a little switching loss for less electrical noise.
The two-loss budget: conduction vs switching
A power MOSFET heats up two distinct ways. Conduction loss flows whenever it is on — I^2 times Rds(on), averaged over the on-fraction of the cycle. Switching loss happens during the transitions: for a brief instant while the device is half-on, it has high voltage across it and high current through it at the same time, and that overlap burns power. Each transition dumps roughly E_sw = (1/2) times Vds times Id times t_switch, and you pay it once per turn-on and once per turn-off, on every cycle.
- Pin the operating numbers. Say the switch handles Vds = 48 V and Id = 10 A, runs at f = 100 kHz with a 50 percent duty cycle, has Rds(on) = 10 milliohm, and transitions in t_switch = 50 ns.
- Conduction loss: P_cond = I^2 times Rds(on) times D = 10^2 times 0.01 times 0.5 = 0.5 W. (Only on for half the cycle, so halve it.)
- Energy per transition: E_sw = (1/2) times 48 times 10 times 50e-9 = 12 uJ. Two transitions (on + off) per cycle gives about 24 uJ per cycle.
- Switching loss: P_sw = energy per cycle times frequency = 24e-6 times 100e3 = 2.4 W.
- Total: 0.5 + 2.4 = 2.9 W of heat. That needs a heat sink — and notice switching loss dwarfs conduction loss here, so faster edges (smaller t_switch) or a lower frequency would help most.
That split holds a deep design lever: conduction loss does not care about frequency, but switching loss grows linearly with it. Switch slowly at low frequency and conduction dominates; switch fast at high frequency and the transitions dominate. This is exactly the tension behind PWM motor drives and switching supplies — you want a high frequency for small magnetics, but every kilohertz adds switching loss, so a strong gate driver that shortens t_switch directly buys back the power you would otherwise turn into heat.
High side, the body diode, and honest cautions
Guide 1 distinguished low-side from high-side switching, and the gate driver is where that bites. Low-side (the FET below the load, source at ground) is easy: the gate is referenced to ground, so a 0-to-10 V drive turns it off and on. High-side (the FET above the load) is hard: when it turns on, the source rides up to the supply rail, so to keep it on the gate must be driven above the supply. Drivers solve this with a bootstrap capacitor or a charge pump that manufactures a voltage a little higher than the rail — which is why dedicated high-side and half-bridge driver chips exist.
There is also a diode you did not draw but always get: the vertical structure builds an intrinsic body diode from source to drain. It sits idle in normal switching but conducts the instant the FET is reverse-biased, which makes it a built-in freewheel path for the kick of an inductive load — the same job a flyback diode does. It is convenient but slow, so in fast half-bridges designers often watch its reverse-recovery carefully or add a faster external diode in parallel.