The rail is not a calm lake
Guide 1 taught you that noise arrives two ways: it wells up from physics inside your own components — thermal, shot, flicker — and it climbs in from a noisy outside world. There is a third source the textbooks are shy about, and it is often the loudest of the lot: a circuit is frequently its own worst enemy. A modern logic chip does not sip current smoothly. It gulps. Every time its gates switch, millions of tiny transistors flip at once and yank a sudden spike of current from the power supply, then go quiet, then gulp again — millions of times a second.
Now picture the wire feeding that chip. You would love to believe the supply rail is a calm, bottomless lake at a rock-steady 3.3 V or 5 V. It is not. Every centimetre of trace or wire has a small inductance — call it the pipe's reluctance to change its flow rate, the flywheel that hates being sped up or slowed down. When the chip demands a sudden surge, that inductance fights the change and the voltage right at the chip's pin briefly sags; when the chip suddenly stops, the inductance overshoots and the pin briefly spikes. The once-flat rail develops ragged dips and ringing, exactly in step with the digital activity.
How big is this glitch? The law of an inductor is V = L times (di/dt) — voltage equals inductance times how fast the current changes. Take a modest 10 nH of trace inductance (roughly a few centimetres of PCB track) and a chip that swings 100 mA in 1 ns as its outputs switch. Then V = 10 times 10^-9 times (0.1 / 10^-9) = 10 times 10^-9 times 10^8 = 1 V. A whole volt of dip on a 3.3 V rail, every switching edge. That filth then leaks into every other chip sharing the rail, raising their effective noise floor from the inside. It is self-inflicted, and it is enormous.
A local water tank for a thirsty machine
Here is the fix, and it is almost insultingly simple. Imagine a factory machine that gulps water in violent bursts, fed by a long thin pipe from a distant reservoir. The pipe cannot deliver a sudden gush — the pressure at the machine collapses every time it demands a slug. So you do not lay a fatter pipe across the whole site. You bolt a small water tank right next to the machine. The tank answers every sudden gulp instantly from a few inches away, then refills gently from the long pipe between gulps. The machine never feels the pipe's lag again.
That tank is a decoupling capacitor: a small capacitor wired straight from the chip's power pin to its ground pin, sitting as close to the chip as you can physically place it. A capacitor is exactly a tiny rechargeable bucket of charge that resists sudden voltage change — which is precisely the property you want. When the chip gulps, the cap dumps its stored charge into the pin from millimetres away, holding the local voltage almost steady while the long inductive rail catches up. Between gulps, the rail trickles charge back into the cap. The chip's violent current loop now lives in a tight little circle between chip and cap, and never has to travel the long, sagging pipe at all.
Does a tiny cap really hold enough? Run the numbers with charge, Q = C times V. A common decoupling value is 100 nF. Suppose you can tolerate the local rail sagging by only 0.1 V during a gulp. The charge the cap can give up for that sag is Q = C times dV = 100 times 10^-9 times 0.1 = 10 nC. A single switching burst might draw, say, 50 mA for 5 ns, which is Q = I times t = 0.05 times 5 times 10^-9 = 0.25 nC. The little bucket holds forty times what one gulp needs — easily enough to ride out the event while the rail refills. That is why a part costing a fraction of a cent rescues a chip costing dollars.
Real capacitors are not just capacitors
Now the honest part the analogy hides. A real capacitor is not a pure bucket. Its leads, its internal plates, and the loop of trace and ground connecting it all add a sliver of parasitic inductance — its equivalent series inductance, or ESL — plus a touch of resistance, the ESR. So a real decoupling cap behaves like an ideal capacitor in series with a tiny inductor. Below a certain frequency the capacitance dominates and the part is a fine low-impedance tank, just as you hoped. Above that frequency the parasitic inductance takes over and the 'capacitor' stops acting like one — its impedance starts rising again with frequency, like an inductor.
The turning point is the self-resonant frequency, where the capacitance and the parasitic ESL cancel and the part's impedance hits its lowest, then climbs. It lands at f = 1 / (2 times pi times sqrt(L times C)). For a 100 nF cap with about 1 nH of ESL, f = 1 / (2 times pi times sqrt(10^-9 times 100 times 10^-9)) ≈ 16 MHz. Below 16 MHz that cap is a great decoupler; far above it, it is nearly useless — its own inductance chokes the fast current it was meant to supply. A smaller 1 nF cap, with the same 1 nH, resonates near 160 MHz, so it keeps working an octave-decade higher.
Two lessons fall straight out of this. First, the loop matters as much as the cap: a 100 nF part with long leads and a winding return trace can carry more inductance in its wiring than inside itself, wrecking its high-frequency reach. Place it tight to the pins, with the shortest possible path back through the ground plane. Second, no single value covers everything. A large bulk cap handles the slow, heavy swings; a small ceramic right at the pin handles the fast spikes; sometimes both sit side by side. That is why you so often see a 100 nF and a 10 uF together at one chip.
Picking and placing them, step by step
distant supply local decoupling chip
(long inductive rail) (tight, low-loop)
+V o----vvv--LLLL--------+------------+----------o Vcc pin
R_trace L_trace | |
[10uF] [100nF] <-- fast gulp loop
bulk local stays in here -->
| |
GND o---------------------+------------+----------o GND pin
(ground plane: short, wide return)
slow/heavy demand -> 10uF answers
fast spike (ns) -> 100nF answers, loop = chip<->cap only
trace V = L di/dt = 10nH x (0.1A / 1ns) = 1 V dip without the cap- Give every power pin of every active chip its own 100 nF ceramic, right at the pin. This is the reflex — not a chip you reason about case by case, but a habit you apply by default. Skipping it is the default mistake.
- Add one larger bulk cap, a reservoir of perhaps 10 uF, per board section or per few chips, to answer the slower, heavier current swings the little caps cannot.
- Place the local cap so its loop to the chip is as small as possible: short traces, and the return straight down into the ground plane through a nearby via. Loop area is inductance, and inductance is the enemy here.
- For very fast logic you may add a smaller cap (1 nF) in parallel to push the low-impedance band higher — but do it knowingly: two values can fight at an anti-resonance between their self-resonant points, a small impedance bump. It rarely bites at normal speeds, yet it is real, so do not just sprinkle decades of values and hope.
Notice that none of these decisions live on the schematic alone. Where the cap physically sits, how short its loop is, how it ties into the ground plane — these are choices you make in PCB layout, and they change the circuit's behaviour as surely as the part value does. A 100 nF cap drawn correctly on the schematic but placed an inch from the pin with a thin meandering ground return is, electrically, a worse cap. The layout is not decoration around the design; the layout is part of the design.
Why it is the most important habit
Of all the techniques in this whole rung, decoupling is the one that earns the title 'the most important habit' for a blunt reason: the failures it prevents are maddening to diagnose after the fact. A board with thin decoupling does not fail cleanly. It works on the bench, then glitches once an hour; it passes at room temperature, then resets when a motor across the room switches on; its analog readings carry an unexplained hash that no filter quite removes. You will burn days chasing a logic bug that is really a sagging rail. The decoupling caps you place by reflex, before any of that, are the cheapest insurance in electronics.
Be honest about its limits, though. Decoupling is necessary, not sufficient. It will not save a fundamentally bad ground — two stages that share a long return wire will still couple through it no matter how many caps you sprinkle, which is the grounding story the very next guide tells. It will not silence a noise source that should be filtered or shielded at its origin, the subject of guide 4. And it cannot rescue a layout where the loops are huge: past a cap's self-resonant frequency, more capacitance does nothing. Decoupling is the first and most reliable line of defence, but it is one line in a layered defence, not a magic eraser.