A switch with no moving parts
You already met the MOSFET as a tap: a tiny handle (the gate) controlling a big flow. In the amplifier guides you held that handle halfway, in the linear region, to make a faithful copy. An analog switch does the opposite — it slams the tap fully open or fully shut, so the transistor behaves either like a plain piece of wire or like a missing piece of wire. The magic word is analog: unlike a logic gate, this switch passes a real signal in either direction and at any voltage within its supply rails. It is an electronic relay with no contacts to wear out, no coil to charge, switching in nanoseconds instead of milliseconds.
But a single transistor makes a lopsided switch. Take a lone n-channel MOSFET passing a signal: its on-resistance (often written Ron) depends on the gate-to-source voltage. When the signal sits near ground, the gate towers above it, Vgs is large, and Ron is comfortably low. But as the signal climbs toward the positive gate rail, Vgs shrinks, Ron balloons, and once Vgs falls below the threshold the channel pinches off and the switch simply stops conducting near the top. A lone NMOS, in other words, drifts out of its triode (ohmic) region exactly when you ask it to pass a high voltage.
The cure is the transmission gate: put an n-channel and a p-channel device in parallel, gated by opposite control signals (this is where n-channel and p-channel team up). The NMOS conducts beautifully in the lower half of the range and the PMOS in the upper half, and across the middle both chip in. The result is an Ron that stays roughly flat from rail to rail — far better than either device alone. This is precisely what lives inside a CMOS analog-switch chip like the classic 4066 or a modern ADG-series part: each switch is a transmission gate plus a little logic to drive the two gates from one control pin.
On-resistance, glitches, and honest limits
How much does Ron actually hurt? Less than beginners fear, but in a sneaky way. An analog switch usually feeds a high-impedance node — a buffer input or a hold capacitor — so very little steady current flows through it, and a hundred ohms in series with a node that draws nanoamps causes only microvolts of DC error. The real sins of Ron are two: it varies with the signal voltage, which bends a clean signal into a slightly distorted one, and it sets a charging time constant with whatever capacitance hangs off the switch, which caps how fast the switch can deliver a new value. Ron is a speed-and-distortion tax, not usually a DC-accuracy tax.
The nastier gremlin is charge injection. When the gate switches off, the charge that was stored in the gate-to-channel capacitance has to go somewhere, and a slug of it dumps onto the signal node. On a big node nobody notices, but on a tiny hold capacitor it becomes a visible voltage step. Put numbers on it: an injected charge of 1 pC landing on a 1 nF cap gives dV = Q / C = (1 x 10^-12) / (1 x 10^-9) = 1 mV of glitch. A bigger cap dilutes the glitch — but slows everything down, the first of many tradeoffs in this guide. Watch the rails too: a real switch has a body diode to its supplies, so a signal that strays outside the rails turns it on and you lose all isolation.
The multiplexer: many lanes, one road
An analog multiplexer is nothing more than a fistful of analog switches sharing one common output, with a few digital address lines that turn on exactly one switch at a time. Think of a railway switchyard funnelling many incoming tracks onto a single main line, one train allowed through at a time. A 3-bit address picks one of 2^3 = 8 channels; a 4-bit address reaches 16. That is how a single, expensive converter can read eight different sensors: the mux walks through the channels in turn and hands each one, briefly, to the same downstream stage.
The gotchas are all about sharing a single wire. When you switch channels, the new channel's Ron must charge the bus capacitance up (or down) to the new voltage, so you must wait a settling time before you trust the reading — flip too fast and channel 5 still carries a ghost of channel 4. The channels also leak into each other through their parasitic capacitances and the shared silicon, so a loud signal on one pin bleeds a faint copy onto its quiet neighbour: that bleed-through is crosstalk, and it sets a floor on how well a mux can isolate. Good muxes are break-before-make — they fully open the old channel before closing the new one — so two sources are never momentarily shorted together through the bus.
Now line the pieces up and you have the front end of almost every data-acquisition system. A mux selects one of many sensors; that single signal flows on toward an analog-to-digital converter; and right before the converter sits the part this guide has been building toward. Because the mux output is still wandering — drifting as the selected sensor changes, settling after each channel hop — the converter needs the signal held perfectly still for the brief moment it does its work. Enter the sample-and-hold.
Sample-and-hold: freezing a moving target
Here is the problem it solves. A converter like the SAR ADC from the data-converter rung does not measure all at once — it weighs the input bit by bit over many clock cycles, like a balance comparing the input against a guess and refining it. If the input moves while that weighing happens, the early bits describe one voltage and the late bits another, and the answer is nonsense. The sample-and-hold is the photo-finish camera: it captures the value at the exact instant you say now, freezing that one sample rock-steady while the converter studies it at its own pace.
The circuit is wonderfully simple: an analog switch, a hold capacitor, and a buffer. Remember that a capacitor is a tiny bucket that resists sudden changes in voltage — that is the whole trick. In track mode the switch is closed, and the bucket charges and discharges to follow the input faithfully. At the chosen instant the switch opens — hold mode — and the bucket, now cut off from the world, simply keeps the charge it had, holding that voltage frozen. A voltage follower reads the cap out to the converter with its high input impedance, so it samples the held value without draining the bucket.
analog switch buffer = voltage follower
(gate) ____
Vin o---o/ o------+-------------------|+ \
| | | >----+---o Vout (to ADC)
control === Ch |- / |
| ____|___/ |
GND | |
+-------------+ (output -> - input)
TRACK : switch CLOSED -> Ch charges, Vout follows Vin
HOLD : switch OPEN -> Ch keeps its charge, Vout held steady
acquisition (track) : tau = Ron x Ch (settle ~9 tau for 12-bit)
droop (hold) : dV/dt = I_leak / Ch- Pick the hold capacitor Ch as a compromise. Too small and it droops and glitches; too big and it acquires slowly. A value around 1 nF is a common starting point for a general-purpose hold.
- Check acquisition time. With switch Ron = 100 ohm and Ch = 1 nF, the charging time constant is tau = Ron x Ch = 100 x (1 x 10^-9) = 100 ns. To settle within half a least-significant bit of a 12-bit converter (1 part in 8192) you need about 9 time constants, so plan roughly 9 x 100 ns ~= 900 ns of track time before each conversion.
- Check droop in hold. Leakage from the switch and buffer slowly bleeds the bucket: dV/dt = I_leak / Ch. With 1 nA of leakage into 1 nF, that is 1 microvolt per microsecond, so across a 10 us conversion the value droops only about 10 uV — negligible if you pick a low-leakage capacitor and buffer.
- Weigh the time-constant tradeoff as a whole. A bigger Ch lowers droop and dilutes charge injection but lengthens acquisition; a smaller Ch is fast but noisier and glitchier. There is no value that wins on every axis — you size Ch for the speed and accuracy your job actually needs.
Why mixed-signal is genuinely hard
Now the honest reckoning that hangs over this whole rung. These parts live exactly where serene analog meets brutal digital, and the two do not get along. A digital line slams between rails in a nanosecond or two, and a fast edge — a large dV/dt across even a few picofarads of stray capacitance — squirts a sharp current spike onto everything nearby. Those spikes couple straight into the sensitive analog nodes you have been nursing: the hold capacitor, the mux bus, the comparator input. The microvolts of droop you fought so carefully to suppress in the last section mean nothing if a single clock edge dumps a millivolt of noise onto the same node.
The defences are layout discipline, not a magic component. Keep the analog and digital return currents on separate paths that meet at a single point, so the digital ground bounce never appears across your analog reference. Put a decoupling capacitor right beside every chip — a local water tank so the supply does not sag when the digital side gulps current. Route fast digital traces well away from high-impedance analog nodes, and lay a ground plane underneath to shield and to give those return spikes a tight, low-inductance path home. And be warned: a breadboard's loose, sprawling stray capacitance and long loops make precise mixed-signal almost impossible — prototype a sensitive front end on a real board, because on a real PCB the layout itself is a circuit element.