The free lunch that lasted thirty years
The previous guide ended on a quiet bombshell: power, not speed, is the binding constraint of modern computers. To see why everything changed, we have to put two famous trends side by side. Moore's law is the observation that the number of transistors on a chip roughly doubles every couple of years as features shrink. By itself that is just more transistors. The magic came from a second, less famous partner — Dennard scaling — which told us what those smaller transistors did for power.
Dennard's insight was this: as you shrink a transistor's dimensions by some factor, you also lower its voltage by the same factor, and the power density — watts per square millimetre — stays constant. Recall from the last guide that dynamic power scales roughly as capacitance times voltage-squared times frequency. Shrink everything together and you get twice as many transistors, each smaller and lower-voltage, switching faster, drawing the same total power. That is the free lunch: every process generation handed you a chip with more transistors and a higher clock rate for no extra watts. From the 1970s to about 2005, single-thread performance roughly doubled every two years almost by sitting still.
Why the wall went up around 2005
Dennard scaling rested on lowering the voltage in step with the size. But voltage cannot fall forever. Push it too close to the transistor's threshold and the device stops switching crisply; worse, the static power from leakage — current that trickles through a transistor even when it is supposedly off — grows explosively as voltage and feature size drop. Around 2005, leakage and reliability limits meant voltage essentially stopped scaling down, even as transistors kept shrinking. The voltage-squared term in dynamic power stopped falling, so cramming more, faster transistors into the same area now meant more watts per square millimetre.
This is the power wall: a chip can only dissipate so much heat before it cooks itself, and a fixed package can shed only so many watts. With voltage stuck, the obvious old lever — crank the clock rate higher — now blows the power budget directly, because dynamic power rises with frequency. So clock speeds stalled in the low single-digit gigahertz and have barely moved since. Suddenly the iron law of the earlier guides bites hard: you cannot keep buying speed by shrinking cycle time, because the power wall forbids it. This is the real reason for the 'megahertz myth' becoming visibly true to everyone — clocks simply stopped climbing.
The escape hatch: go parallel instead of fast
If you cannot make one core faster, but Moore's law still hands you more transistors, the answer almost writes itself: spend the extra transistors on more cores instead of a hotter one. This is precisely why the industry pivoted to the multicore chip around 2005 — not because parallel programming suddenly got easy (it did not), but because it was the only way left to turn extra transistors into performance without smashing the power wall. Two cores at a modest clock can do more total work per watt than one core pushed to a reckless clock, because dynamic power grows with the square of voltage but only linearly with core count.
But here the ghost from guide one returns to haunt us. More cores only help if the program can be split across them, and Amdahl's law caps that hard: if even 10% of your work is stubbornly serial, no number of cores beats a 10x speedup. So multicore was never a clean substitute for the old free lunch — it traded a problem hardware could solve (shrinking transistors) for a problem software must solve (finding parallelism). That trade is still being paid off today, and it is why a GPU of a thousand tiny workers shines on regular, parallel math but is useless on serial, branchy code.
Dark silicon: more transistors than you can light up
Now the two broken trends collide and produce the strangest fact in modern architecture. Moore's law keeps doubling the transistors per chip; the broken Dennard scaling means the power budget per chip stays roughly flat. Do the arithmetic across a few generations and the conclusion is inescapable: the fraction of a chip you can switch on at full speed, within the power budget, shrinks every generation. The rest must sit idle — powered down or clocked down — at any instant. That permanently-dark fraction is called dark silicon.
a thought experiment across process generations (transistors double; chip power budget stays flat) gen transistors fraction you can power at once --- ----------- ----------------------------- 1 1x 100% (whole chip lights up) 2 2x ~60% 3 4x ~35% 4 8x ~20% (most of the chip is DARK) numbers illustrative, not exact -- the trend is the point: silicon area is cheap, switching it all at once is not.
Dark silicon sounds like pure waste, but it quietly flips the economics of design. If most of the chip must be dark anyway, then silicon area is cheap and energy is the scarce resource. So fill the dark area with many specialised blocks, each idle most of the time, and light up only whichever one fits the task at hand. A modern phone chip is exactly this: a system-on-chip studded with a CPU, a GPU, a neural engine, video codecs, and crypto units, most of them dark at any moment. The question stopped being 'how do we keep every transistor busy?' and became 'which few transistors should we wake for this job?'
The toolbox: gating, DVFS, and specialisation
Architects fight the power wall with a small, sharp toolbox. The bluntest tool is gating: stop wasting power on parts you are not using. Clock gating freezes the clock to an idle block so its transistors stop switching and its dynamic power drops to near zero; power gating goes further and cuts the supply entirely, killing the leakage too, at the cost of time to wake back up. The second tool is DVFS — dynamic voltage and frequency scaling — which slides voltage and clock up under heavy load and back down when the machine is idle. Because power falls with voltage squared, dropping the voltage a little when you do not need peak speed saves a lot of energy.
- A burst of work arrives, so the governor raises voltage and clock (DVFS up) to finish it with low latency — energy per cycle is high, but the job ends fast.
- Idle blocks — say the GPU during a phone call — are clock-gated, so their transistors stop switching and burn no dynamic power.
- When the burst is done, the governor lowers voltage and clock (DVFS down); because power falls with voltage squared, even a small drop saves a lot of energy.
- Blocks idle long enough get power-gated entirely, killing leakage too — accepting a slower wake-up in exchange for near-zero static power.
But the deepest tool is specialisation, and dark silicon is what makes it pay. A general-purpose CPU spends most of its energy not on your actual arithmetic but on overhead — fetching, decoding, scheduling, predicting branches, moving data around. A domain-specific architecture strips that overhead for one job: a tensor processing unit is a sea of multiply-accumulate units doing nothing but the matrix math of neural networks, often at far lower precision (reduced precision) because the task tolerates it. Built as a fixed-function accelerator, it can be ten to a hundred times more energy-efficient than a CPU on that one task. That is why the post-2005 world is full of heterogeneous chips: not because specialised hardware is faster in some abstract sense, but because energy, not transistors, is the thing we have run out of.
The honest synthesis: which metric, for whom?
Step back and the whole rung snaps into focus. The earlier guides taught the iron law, latency versus throughput, benchmarking, and the energy-delay product; this last guide explains the historical force — the end of Dennard scaling — that made every one of those metrics start to matter at once. When clocks could climb for free, 'faster' was nearly the only word anyone needed. When the power wall ended that, the field fractured into multicore, GPUs, and accelerators, and with it the question 'which metric?' became unavoidable.
So the honest closing thought is not a number but a habit of mind. Before optimising anything, ask what you actually care about, then choose the metric that measures that — energy, latency, throughput, or some weighted blend — and run it through the iron law and Amdahl's law to see what you can really move. The dark silicon era did not make computers worse; it made them honest. We can no longer pretend one knob makes everything 'faster'. We have to say faster at what, for whom, and at what energy — and that clarity is the most useful thing this entire rung has to give you.