The Memory Hierarchy & Caches

write-back

Imagine you are editing a borrowed document. You could run to the original archive and re-file it after every single sentence you change (safe, but exhausting), or you could make all your edits on your desk copy and only re-file the whole thing once, when you are finally done with it. Write-back is the lazy-but-efficient second approach for caches: when the CPU writes data, the change is made only in the cache, and the slower memory below is updated later, only when that line is finally evicted.

To make this work, each cache line carries a single dirty bit. When the CPU writes to a line, the cache updates its own copy and sets the dirty bit to mark 'this line has changes that memory does not yet know about'. The line can be written and re-written many times, all at fast cache speed, with memory left untouched. Only when that line must be evicted (to make room for an incoming block) does the cache check the dirty bit: if set, it writes the whole line back to memory before reusing the slot; if clean, it can simply discard the line, since memory already holds an identical copy.

Write-back's big win is traffic: a variable updated a thousand times in a loop touches slow memory just once at the end, not a thousand times. This makes it the default for almost all modern caches. The costs are honest ones: the cache and memory are temporarily inconsistent (memory holds a stale value until the write-back happens), which complicates anything that reads memory independently — DMA devices, other cores, and cache-coherence protocols must account for dirty cache copies. It is also slightly more complex hardware (the dirty bit, the eviction write-back path) and an eviction of a dirty line costs extra because it must perform that deferred write. The alternative, write-through, trades this efficiency for simplicity and an always-consistent memory.

A loop does 'total += a[i]' 1000 times on a cached line holding 'total'. Write-back updates only the cached copy each iteration (dirty bit set), and writes the final value to memory just once, when the line is evicted — 1 memory write instead of 1000.

Writes hit only the cache; a dirty line is flushed to memory just once, on eviction.

With write-back, memory can hold a STALE value until eviction. That is fine for one core's correctness, but anything else reading memory directly — DMA, other cores — must be told about dirty cache copies; this is a big reason cache-coherence protocols exist.

Also called
copy-back回寫