SRAM
/ ESS-ram /
Imagine a light switch that, once you flip it on or off, simply stays that way as long as the lights in the building are on — you never have to keep nudging it. SRAM is memory built from exactly such self-holding switches. Each bit is stored in a tiny circuit of cross-connected transistors that latch onto a 0 or a 1 and actively keep holding it, so the value sits there stable and ready until you deliberately change it or cut the power. This is why it is called static: it does not fade.
Concretely, a standard SRAM cell uses about six transistors (a 6T cell): two pairs form a back-to-back loop of inverters that hold the bit, and two more act as gates that let you read or write it. Because the loop is actively driven, reading is fast and non-destructive, and there is no leaking charge to top up. The price is area: six transistors per bit is bulky and power-hungry compared with the alternative, so you can fit far fewer bits on the same silicon. SRAM is fast but not dense and not cheap per bit.
Why it matters: SRAM is the technology behind the parts of the machine that must be fastest — CPU registers, the register file, and the on-chip caches (L1, L2, L3). It is deliberately placed close to the cores and kept small because every bit is expensive. The honest trade-off runs through the whole memory hierarchy: SRAM is fast-but-tiny, DRAM is dense-but-slower. You build a hierarchy precisely because no single technology is both fast and big and cheap at once.
A modern CPU might hold 64 KiB of SRAM as its L1 cache right beside each core, but several gigabytes of DRAM as main memory — because 64 KiB of SRAM already costs more silicon area than you would want to spend on gigabytes of it.
SRAM is reserved for the small, hottest layers; DRAM provides the bulk.
SRAM is 'static' only while powered — it is still volatile and loses everything when power is removed. 'Static' refers to not needing periodic refresh (unlike DRAM), not to keeping data without power.