relaxed ordering
/ relaxed -> ree-LAKST /
Relaxed ordering is the atomic with the ordering removed — it keeps the operation indivisible but makes no promises whatsoever about how it lines up with OTHER memory operations. Picture a counter on a wall that several people bump up: every bump is counted exactly once (that is the atomicity), but you cannot use 'the counter reached 5' to conclude anything about what else those people had done by then.
Formally, a relaxed atomic operation guarantees only two things: it is atomic (no torn or lost updates on that single location), and accesses to that one location still respect its own modification order (each thread sees that variable's values in a consistent order, never going backwards). It creates NO happens-before edges with other variables, establishes NO synchronizes-with relationship, and the compiler and CPU may freely reorder it relative to surrounding non-dependent memory operations. It is the cheapest atomic — often a plain load or store on x86 with no barrier at all.
Its honest, narrow uses: an event counter or statistics tally where you only ever read the total at the end; a flag you only ever set once and whose mere visibility (not the data it guards) is all you need, combined later with a fence; or generating unique ids. Its abuse is everywhere: people reach for relaxed to 'go faster' on a flag that is actually guarding data, and the data then leaks through with no ordering. Rule of thumb — if you are using relaxed to publish or consume DATA, you are almost certainly wrong and want release/acquire.
atomic_fetch_add_explicit(&hits, 1, memory_order_relaxed); /* fine: just counting */ /* later, after a join: */ long total = atomic_load_explicit(&hits, memory_order_relaxed);
A pure counter is the textbook safe use of relaxed: no other memory's visibility is riding on it.
Relaxed does NOT mean 'no synchronization needed' or 'eventually consistent' — it means you take on the full burden of ordering yourself; one stray relaxed publish of a pointer is a textbook way to read uninitialized data on ARM.