Instruction Set Architecture (ISA)

the opcode

/ OP-code /

The opcode is the part of an instruction that says what to do. If an instruction were a sentence, the opcode would be the verb. The processor reads an incoming instruction, looks at its opcode field, and that tells it: is this an add, a load, a store, a branch? The rest of the instruction (the register numbers, any constant) is the 'who and with what' — the nouns — but the opcode is the action.

Concretely the opcode is a small group of bits with a fixed meaning. The decoder inside the processor inspects those bits and, like looking up a word in a codebook, maps the bit pattern to an operation, then sets up the rest of the machine to carry it out. In RISC-V the main opcode is a 7-bit field, sometimes assisted by extra 'function' fields (function3 and function7) that distinguish, say, add from subtract when they share a top-level opcode — so 'opcode' loosely means the whole set of bits that selects the operation. In x86, by contrast, the opcode can be one or several bytes and its length varies.

Why it matters: the opcode is the very first thing decoding depends on, so its placement and size shape how fast and simple a processor can be. Reserving opcode space is also how an ISA grows — every new instruction in an extension needs an unused opcode pattern, and running out of opcode room is a real, practical constraint that ISA designers plan around for decades. A subtle point: the same human-readable mnemonic ('add') maps to a specific opcode bit pattern, but the mnemonic is for people; the opcode is what the silicon actually reads.

In RISC-V, both 'add' and 'sub' share the same 7-bit opcode for register arithmetic; the function7 bits then differ to tell them apart. So the opcode says 'this is register math' and a helper field says 'specifically, subtract'.

The opcode picks the broad operation; helper fields can narrow it down.

Opcode space is finite and precious. An ISA cannot add unlimited new instructions for free — each one consumes an encoding slot, which is why mature ISAs accrete extensions carefully rather than tossing in instructions on a whim.

Also called
operation codeop field運算碼操作碼