instruction restart
Imagine you are halfway through writing a sentence when you run out of ink. You stop, fetch a new pen, and then write the whole sentence again from its first word, as if nothing happened. You do not try to continue from the middle of the half-written word — that would leave a mess. Instruction restart is exactly this discipline for the CPU: when an instruction is interrupted by a page fault partway through, the simplest correct fix is to re-execute the entire instruction from its start once the missing page is in memory.
Concretely, a page fault can strike in the middle of executing one machine instruction — for example, an instruction that adds a value from memory might fault while fetching that value. The OS services the fault, but then the instruction must complete. The clean approach is to restart it: reset the program counter to point at the faulting instruction again and let the CPU run it from the beginning, now with the page present. This requires the instruction to be restartable, meaning re-executing it from scratch produces the correct result and no harmful double effect. For most instructions this is automatic. The subtle danger is an instruction that has already changed state before it faulted — for instance, a block-move instruction that copies many bytes and updates pointers as it goes, or an auto-increment addressing mode that has already bumped a register. Re-running such an instruction naively could double a side effect or copy onto already-copied data.
Why it matters: instruction restart is a hard hardware requirement for demand paging to be possible at all. If a CPU could not cleanly recover from a fault mid-instruction, you simply could not use demand paging on it, because any instruction touching memory could fault at any time. Architecture designers handle the tricky cases by either making instructions checkable and restartable, or by saving enough state (or undoing partial effects) so the instruction can resume correctly. The lesson: virtual memory is not purely an OS idea — it imposes real constraints on the CPU's instruction set design.
An 'add r1, [x]' instruction faults while fetching x. After the OS loads x's page, the CPU does not try to resume mid-instruction; it sets the program counter back to 'add r1, [x]' and runs the whole instruction again, now succeeding cleanly.
Re-run the whole instruction from its start, not from the middle.
The hard cases are instructions with side effects that occur before a possible fault — block moves and auto-increment addressing. The architecture must either pre-check all the pages the instruction will touch, or be able to undo partial work; otherwise a naive restart corrupts data.