I²C (inter-integrated circuit bus)

I²C lets one controller chat with dozens of peripheral chips over just two shared wires — a clock line (SCL) and a data line (SDA) — by giving every device a unique 7-bit address. It's a party line: the controller calls out an address, only the device with that name answers, and everyone else stays quiet. This addressing is what sets I²C apart — a fistful of sensors, a real-time clock, an EEPROM, and a display can all hang off the same two wires, where UART would need a separate pair for every device.

Both lines are 'open-drain': any chip can only pull a line low; pull-up resistors return it high when released, so no two devices ever fight over the bus. The controller drives the clock and frames each transfer with a start condition, the address, a read/write bit, then 8-bit bytes each acknowledged (ACK) by the receiver, ending with a stop. Standard speeds run 100 kHz to 400 kHz (up to 3.4 MHz in high-speed mode) — slower than SPI but wonderfully economical on pins. The price is complexity: addressing, ACK handshakes, clock stretching, and that infamous moment when two devices ship with the same fixed address and clash on the bus.