DSP processor
A DSP processor is a microchip purpose-built to crunch signals — its whole architecture bends around one operation it must perform billions of times a second: multiply a sample by a coefficient and add it to a running total (the multiply-accumulate, or MAC). Where a general CPU treats that as several steps, a DSP does it in a single clock tick, often several MACs in parallel, fetching data and coefficient simultaneously over separate memory buses. It is a specialist sprinter, not a generalist.
Beyond the MAC, classic DSPs add hardware that filter math demands for free: circular buffers that wrap delay lines without address arithmetic, zero-overhead loops that repeat an inner kernel with no branch penalty, and saturating fixed-point math that clips instead of wrapping on overflow. You'll find these cores inside modems, audio codecs, hearing aids, radar, and motor drives — though today much DSP also runs on the vector and tensor units bolted onto ordinary CPUs, GPUs, and AI accelerators.
The historic dividing line was the Harvard architecture — separate program and data memories so an instruction and its operands fetch in parallel — versus the von Neumann CPU sharing one bus; modern DSPs blur this, but the parallel-fetch instinct survives.