ECC memory

Imagine sending an important number by mail, but you fear a smudge might flip a digit in transit. So you cleverly send a few extra check digits computed from the number — enough that, if one digit arrives wrong, the recipient can not only detect the error but figure out which digit flipped and correct it. ECC memory does exactly this for data stored in DRAM: it keeps extra check bits so that occasional bit flips are caught and silently fixed.

Concretely, ECC memory stores extra redundant bits alongside the data — a common scheme adds 8 check bits per 64 data bits (which is why ECC DIMMs are 72 bits wide rather than 64). The check bits are computed with an error-correcting code (often a SECDED code: Single Error Correct, Double Error Detect). On every read, the memory controller recomputes the code and compares: if a single bit has flipped, the math pinpoints and corrects it on the fly; if two bits have flipped, it can at least detect that something is wrong and raise an error rather than hand back silently corrupt data.

Why it matters: bit flips are not paranoia — cosmic rays, stray radiation, and electrical noise occasionally flip a stored bit (a soft error). In a laptop that is a rare annoyance; in a server with terabytes of RAM running for years, or a scientific computation, or a financial ledger, a silent flip can corrupt results or crash the system, and the larger the memory and the longer the uptime, the more certain such events become. The honest trade-off: ECC costs a little extra memory, a little money, and a tiny bit of latency, which is why consumer machines often skip it — but for servers and any system where silent corruption is unacceptable, ECC is standard and worth it.