a control signal
A control signal is a single wire whose value — usually just a 0 or a 1 — flips one switch in the datapath. Think of the buttons on a washing machine: one button enables the spin, another opens the water valve, another picks hot or cold. Each control signal is one such button, and the control unit presses the right combination of buttons for each instruction.
Each named signal does one specific job. RegWrite = 1 enables writing the register file (0 leaves registers unchanged). MemWrite = 1 stores into data memory; MemRead = 1 loads from it. ALUSrc selects whether the ALU's second operand is a register value or a sign-extended immediate. MemToReg selects whether the value written back comes from the ALU or from memory. Branch, combined with the ALU's zero flag, decides whether the next PC is the branch target or PC + 4. Multi-bit signals exist too — the ALU-operation code is a few bits that pick add versus subtract versus AND. Together, the values on all these wires at one moment define exactly what the datapath does this cycle.
The honest mental model: control signals are the alphabet in which an instruction is 'spoken' to the hardware. Two different instructions are simply two different patterns of these 0s and 1s. Getting one wrong — say asserting MemWrite during an add — would corrupt memory even though the math was fine. This is why the control logic is tabulated carefully (the control table) and verified: a single mis-set signal silently breaks an instruction.
RegWrite is the difference between a store and a load that look almost identical otherwise: a store leaves RegWrite = 0 (it writes memory, not a register), while a load sets RegWrite = 1 (it writes a register). One wire, opposite outcomes.
Each control signal is one wire flipping one switch; the pattern of all of them defines the instruction's action.
'Asserted' just means a signal is set to its active value (often 1). A signal being 0 is not 'nothing' — it actively means 'do not do this', e.g. MemWrite = 0 explicitly forbids a store.